I was wandering if anyone else has ever come across this problem.

When writing a multitasking OS for PowerPC, one of the important
chores that needs to be done
in the task switching routine (scheduler) is clearing of the "RESERVE"
bit. Basically, every time
a task switch happens, the special reserve bit has to be cleared with
a stwcx. instruction. Otherwise
any atomic functionality achieved through the use of lwarx/stwcx. (LL/
SC in PPC world) will be broken.
In fact, some low-level library functions that are now taken for
granted (like gcc's atomic_add
and exchange_and_add) use these instruction.

The kernel that I'm working with clearly does not do that. Only after
hooking my own routine into the
task switching logic and clearing the RESERVE bit manually, did the
atomic operations become correct.

I'm skeptical that such a thing would go unnoticed for so long, and
thought that maybe there's already
some knowledge base material on this somewhere. But after doing
extensive search on google, google
groups and WindRiver site, it looks like noone else reported it.

The kernel I'm using is 5.3.1