This is a discussion on L1/L2 Cache in X86 Processor - VxWorks ; Hi VxWorks experts, I want to port the BSP to X86 processor. The reference processor (BSP) has L1 cache. But in my processor, L1 and L2 cache is used.What I have to update in the BSP? Whether I have to ...
Hi VxWorks experts,
I want to port the BSP to X86 processor. The reference processor
(BSP) has L1 cache. But in my processor, L1 and L2 cache is used.What
I have to update in the BSP?
Whether I have to update anything in romInit.s and sysALib.s like
disable the L1/L2 cache or configure some processor registers.
If we port the BSP to PowerPC Processor, then we can refer the U-
Boot open source. For X86 processors, Which open source I could refer.
-Regards,
C.Premnath
