Hi,

We are trying to enhance our existing platform by adding additional
SDRAM. The platform is based on Vxworks 5.4 and an 8260 processor. We
use Bank based interleaving on the 60x bus and have 128 MB of RAM on
one CS. This original config used PTEs to map the memory. We wish to
add another 128 MB on another CS. At present we can only seem to
access the second bank if the MMU is configured as a BAT. If we change
the define of LOCAL_MEM_SIZE from 0x8000000 to 0x10000000 and try to
config the PTE table, it will lockup(watch dog disabled) or watchdog
the fires.

I am pretty sure that the HW is configured correctly. Here is what we
have verfied in romInit.s
- OR, BR registers
OR1:0xf80024c0
BR1:0x00000041 - /* 128 MB*/

OR9:0xf80024c0
BR9:0x08000041 /* UPPER 128 MB*/
- PSMDR: 0x4252b456
- Invalidate TLBs (128 entries)
- Init I/DBats to zero
- I-cache enabled for faster flash booting

Here is a portion of the SDRAM config for PTEs in sysLib.c
{
(void *) RAM_LOW_ADRS,
(void *) RAM_LOW_ADRS,
(LOCAL_MEM_SIZE - RAM_LOW_ADRS-USER_RESERVED_MEM),
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_MEM_COHERENCY,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE | VM_STATE_MEM_COHERENCY
},

The strange thing is that it seems to boot the very first time after
reset when using a BDM. On its own the image always fails. I have
tried to capture the failure case with the BDM and it seems to be
stuck in kernelInit() somewhere.

Any help is appreciated.

Regards,
Diljit