On Mar 9, 12:49 pm, "toby" wrote:
> On Mar 8, 8:35 pm, clarkb...@gmail.com wrote:
>
>
>
> > Hello guys,

>
> > I have a question about GNU make running on the Solaris 8 platform.
> > We have a GNU Makefile which has a "depend" target (for the usual
> > concept of make depend in C++ programming) which looks like this:

>
> > depend : prep $(patsubst %.cc,%.o , $(OBJ))
> > $(CC) $(CPPFLAGS) -xM1 $? > .depend


I did think of another way. You may be able to make 'prep' an "order-
only prerequisite":

depend : $(patsubst %.cc, %.o, $(OBJ)) | prep
...

Can you explain why you use '$?' instead of '$^'? Won't this leave you
with a possibly incomplete set of dependencies? And what does 'prep'
actually do?

>
> > Obviously this has a problem, in that the prep target (along with the
> > depend target) is phony, and so the CC command to generate
> > dependencies fails with the "prep" value passed as a filename in "$?"
> > in the command.

>
> > I had an idea to change the compilation command to:
> > $(CC) $(CPPFLAGS) -xM1 $(filter %.cc,$?) > .depend
> > and I believe this should work. My question is: while this solution
> > might work, I'm not sure it is the "preferred" solutoin using GNU
> > make. Is this a "good enough" solution?

>
> It's probably how I'd do it. In other words, I can't think of a better
> way either.
>
> > Or this there another,
> > "preferred" solution that is better? If there is, please let me know
> > what it might be.

>
> > Thanks