Issue with Sun ULTRA 2 - FAILS TO START - SUN

This is a discussion on Issue with Sun ULTRA 2 - FAILS TO START - SUN ; Hello: A friend bought a Sun U2 off Ebay and when it arrived here in Madrid, it would not boot. We ran the POST test and this is what happens... It seems to hang looking for something after the sbus ...

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Thread: Issue with Sun ULTRA 2 - FAILS TO START

  1. Issue with Sun ULTRA 2 - FAILS TO START

    Hello:

    A friend bought a Sun U2 off Ebay and when it arrived here in Madrid, it would not boot. We ran the
    POST test and this is what happens... It seems to hang looking for something after the sbus test. I
    have looked in docs.sun.com but there is not a good answer.

    Any help would be great.

    Kevin


    Hardware Power ON

    Master CPU online
    Slave-Offline!
    Slave Offline, disabled
    Button Power ON

    Master CPU online
    Slave-Offline!
    Slave Offline, disabled

    Probing keyboard Done
    %o0 = 0000.0000.0000.4001

    Executing Power On SelfTest

    0>@(#) Sun Ultra Enterprise 2 FCS_POST, version SB3.3.7 3/09/1998 02:14 PM
    0> UltraSparc2 Version 2.0
    0>Ecache Probe
    0> Ecache size 2048 Kb
    0>Ecache Tag Test
    0>Ecache RAM Test
    0>Ecache Address Line Test
    0>Initialize and Verify Ecache
    0>SC Initialization
    0> SC_MP id=acf1, UPA Number=4, Impl=0, Ver=3
    0>SC Dual Tag RAM Test
    0> Clearing DTAG's.
    0>Initialize SC_MP memory control registers
    0>BMX Test
    0> Checking BMX's
    0>Probing Memory
    0> Found Memory Group #0 32Mb 32Mb 32Mb 32Mb
    0> Found Memory Group #1 32Mb 32Mb 32Mb 32Mb
    0> Found 256 Megabytes of usable Main Memory
    0>SIMM Group Base Addr Size Group Status
    0> 0 00000000.00000000 08000000 00
    0> 1 00000000.20000000 08000000 00
    0>Quick Memory Test
    0>Clear and Test Stack Memory
    0>
    SelfTest Initializing
    0>Basic CPU Test
    0> Instruction Cache Tag RAM Test
    0> Instruction Cache Instruction RAM Test
    0> Instruction Cache Next Field RAM Test
    0> Instruction Cache Pre-decode RAM Test
    0> Data Cache RAM Test
    0> Data Cache Tags Test
    0>MMU Enable Test
    0> DMMU Registers Access Test
    0> DMMU TLB DATA RAM Access Test
    0> DMMU TLB TAGS Access Test
    0> IMMU Registers Access Test
    0> IMMU TLB DATA RAM Access Test
    0> IMMU TLB TAGS Access Test
    0> DMMU Init
    0> IMMU Init
    0> Mapping Selftest Enabling MMUs
    0>FPU Register Test
    0> FPU Registers and Data Path Test
    0> FSR Read/Write Test
    0>EPROMs Test
    0> PROM Datapath Test
    0>Serial Ports Test
    0> Slavio Serial Ports Test
    0>NVRAM TOD Test
    0> M48T59 (TOD) Init
    0> M48T59 (TOD) Functional Part 1 Test
    0>Memory Test
    0> Memory Clear Test
    0> Test being relocated into Memory
    0> Memory RAM (blk) Test
    0> Test being relocated into Memory
    0> Memory Stress Test
    0> Test being relocated into Memory
    0> Memory Address Line Test
    0> Test being relocated into Memory
    0>Forcing ECC Faults Test
    0> ECC CE Pattern Test
    0> ECC CE Check bit Test
    0> ECC UE Pattern Test
    0> ECC UE Check bit Test
    0>SysIO Registers Test
    0> SysIO Regsiter Initialization
    0> IOMMU Registers and RAM Test
    0> Streaming Buffer Registers and RAM Test
    0> SBus Control and Config Registers Test
    0> SysIO RAM Initialization
    0>SysIO Functional Test
    0> Mapping Selftest Enabling MMUs
    0> Clear Interrupt Map and State Registers
    0> SysIO Interrupts Test
    0> SysIO Timers/Counters Test
    0> IOMMU Virtual Address TLB Tag Compare Test
    0> Streaming Buffer Flush Test
    0> DMA Merge Buffer Test
    0>CPU Speed
    0> CPU 0 Running at 296 MHZ.
    0>Ecache Stress Test
    0> Ecache Stress Test
    0>APC Test
    0> APC Registers Tests Test
    0> APC DVMA Test
    0>Data Cache Test
    0> Dcache Init
    0> Dcache Enable Test
    0> Dcache Functionality Test
    0>FEPS Test
    0> Parallel Port Registers Test
    0> Parallel Port ID is: 0x2
    0> Parallel Port DVMA burst mode read/write Test
    0> FAS366 Registers Test
    0> ESP FAS366 DVMA burst mode read/write Test
    0> FEPS Internal Loopbacks Test
    0> Ethernet Tranceiver Internal Loopbacks Test
    0>CPU Functional Test
    0> Mapping Selftest Enabling MMUs
    0> SPARC Atomic Instructions Test
    0> CPU Dispatch Control Register Test
    0> CPU Softint Registers and Interrupts Test
    0> CPU Tick and Tick Compare Registers Test
    0> Uni-Processor Cache Coherence Test
    0> Base_address = 00000000
    0> UltraSPARC-2 Prefetch Instructions Test
    0> SRAM Mode = 22, Clock Mode = 3:1, ELIM = 3, PCON = 0f7, MCAP = 13
    0> Ecache Size Limited to 00200000; 000006b6.3dc0803b
    0>
    << POST COMPLETE >>
    0>**Entering OBP (3b)


    Power On Selftest Completed
    Status = 0000.0000.0000.0000 0000.01ff.f007.87e0 1f66.0000.01c1.0105

    Software Power ON

    Master CPU online
    Slave-Offline!
    Slave Offline, disabled

    @(#) Sun Ultra 2 UPA/SBus 3.11 Version 2 created 1997/12/05 10:25
    Clearing DTAGS Done
    Probing Memory Done
    MEM BASE = 0000.0000.2000.0000
    MEM SIZE = 0000.0000.0800.0000
    MMUs ON
    Copy Done
    PC = 0000.01ff.f000.2c30
    PC = 0000.0000.0000.2c74
    Decompressing into Memory Done
    Size = 0000.0000.0006.7730
    ttya initialized
    SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
    Probing Memory Bank #0 32 32 32 32 : 128 Megabytes
    Probing Memory Bank #1 32 32 32 32 : 128 Megabytes
    Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
    Probing Memory Bank #3 0 0 0 0 : 0 Megabytes
    Probing UPA Slot at 1e,0 Nothing there
    Probing /sbus@1f,0 at e,0 SUNW,fas sd st SUNW,hme SUNW,bpp
    Probing /sbus@1f,0 at 0,0 cgsix
    Probing /sbus@1f,0 at 1,0 EBS,sbs370 EBS,si64
    Probing /sbus@1f,0 at 2,0 Nothing there
    Probing /sbus@1f,0 at 3,0 Nothing there


  2. Re: Issue with Sun ULTRA 2 - FAILS TO START

    I had something happen like this with a SPARCserver 5. All I did was reset
    the NVRAM to its defaults. I do agre that the docs.sun.com pages are not the
    most intutive things in the world..


    enjoy

    Craig


    "Sysadmin" wrote in message
    news:3f143deb@news.vodafone.es...
    > Hello:
    >
    > A friend bought a Sun U2 off Ebay and when it arrived here in Madrid, it

    would not boot. We ran the
    > POST test and this is what happens... It seems to hang looking for

    something after the sbus test. I
    > have looked in docs.sun.com but there is not a good answer.
    >
    > Any help would be great.
    >
    > Kevin
    >
    >
    > Hardware Power ON
    >
    > Master CPU online
    > Slave-Offline!
    > Slave Offline, disabled
    > Button Power ON
    >
    > Master CPU online
    > Slave-Offline!
    > Slave Offline, disabled
    >
    > Probing keyboard Done
    > %o0 = 0000.0000.0000.4001
    >
    > Executing Power On SelfTest
    >
    > 0>@(#) Sun Ultra Enterprise 2 FCS_POST, version SB3.3.7 3/09/1998 02:14

    PM
    > 0> UltraSparc2 Version 2.0
    > 0>Ecache Probe
    > 0> Ecache size 2048 Kb
    > 0>Ecache Tag Test
    > 0>Ecache RAM Test
    > 0>Ecache Address Line Test
    > 0>Initialize and Verify Ecache
    > 0>SC Initialization
    > 0> SC_MP id=acf1, UPA Number=4, Impl=0, Ver=3
    > 0>SC Dual Tag RAM Test
    > 0> Clearing DTAG's.
    > 0>Initialize SC_MP memory control registers
    > 0>BMX Test
    > 0> Checking BMX's
    > 0>Probing Memory
    > 0> Found Memory Group #0 32Mb 32Mb 32Mb 32Mb
    > 0> Found Memory Group #1 32Mb 32Mb 32Mb 32Mb
    > 0> Found 256 Megabytes of usable Main Memory
    > 0>SIMM Group Base Addr Size Group Status
    > 0> 0 00000000.00000000 08000000 00
    > 0> 1 00000000.20000000 08000000 00
    > 0>Quick Memory Test
    > 0>Clear and Test Stack Memory
    > 0>
    > SelfTest Initializing
    > 0>Basic CPU Test
    > 0> Instruction Cache Tag RAM Test
    > 0> Instruction Cache Instruction RAM Test
    > 0> Instruction Cache Next Field RAM Test
    > 0> Instruction Cache Pre-decode RAM Test
    > 0> Data Cache RAM Test
    > 0> Data Cache Tags Test
    > 0>MMU Enable Test
    > 0> DMMU Registers Access Test
    > 0> DMMU TLB DATA RAM Access Test
    > 0> DMMU TLB TAGS Access Test
    > 0> IMMU Registers Access Test
    > 0> IMMU TLB DATA RAM Access Test
    > 0> IMMU TLB TAGS Access Test
    > 0> DMMU Init
    > 0> IMMU Init
    > 0> Mapping Selftest Enabling MMUs
    > 0>FPU Register Test
    > 0> FPU Registers and Data Path Test
    > 0> FSR Read/Write Test
    > 0>EPROMs Test
    > 0> PROM Datapath Test
    > 0>Serial Ports Test
    > 0> Slavio Serial Ports Test
    > 0>NVRAM TOD Test
    > 0> M48T59 (TOD) Init
    > 0> M48T59 (TOD) Functional Part 1 Test
    > 0>Memory Test
    > 0> Memory Clear Test
    > 0> Test being relocated into Memory
    > 0> Memory RAM (blk) Test
    > 0> Test being relocated into Memory
    > 0> Memory Stress Test
    > 0> Test being relocated into Memory
    > 0> Memory Address Line Test
    > 0> Test being relocated into Memory
    > 0>Forcing ECC Faults Test
    > 0> ECC CE Pattern Test
    > 0> ECC CE Check bit Test
    > 0> ECC UE Pattern Test
    > 0> ECC UE Check bit Test
    > 0>SysIO Registers Test
    > 0> SysIO Regsiter Initialization
    > 0> IOMMU Registers and RAM Test
    > 0> Streaming Buffer Registers and RAM Test
    > 0> SBus Control and Config Registers Test
    > 0> SysIO RAM Initialization
    > 0>SysIO Functional Test
    > 0> Mapping Selftest Enabling MMUs
    > 0> Clear Interrupt Map and State Registers
    > 0> SysIO Interrupts Test
    > 0> SysIO Timers/Counters Test
    > 0> IOMMU Virtual Address TLB Tag Compare Test
    > 0> Streaming Buffer Flush Test
    > 0> DMA Merge Buffer Test
    > 0>CPU Speed
    > 0> CPU 0 Running at 296 MHZ.
    > 0>Ecache Stress Test
    > 0> Ecache Stress Test
    > 0>APC Test
    > 0> APC Registers Tests Test
    > 0> APC DVMA Test
    > 0>Data Cache Test
    > 0> Dcache Init
    > 0> Dcache Enable Test
    > 0> Dcache Functionality Test
    > 0>FEPS Test
    > 0> Parallel Port Registers Test
    > 0> Parallel Port ID is: 0x2
    > 0> Parallel Port DVMA burst mode read/write Test
    > 0> FAS366 Registers Test
    > 0> ESP FAS366 DVMA burst mode read/write Test
    > 0> FEPS Internal Loopbacks Test
    > 0> Ethernet Tranceiver Internal Loopbacks Test
    > 0>CPU Functional Test
    > 0> Mapping Selftest Enabling MMUs
    > 0> SPARC Atomic Instructions Test
    > 0> CPU Dispatch Control Register Test
    > 0> CPU Softint Registers and Interrupts Test
    > 0> CPU Tick and Tick Compare Registers Test
    > 0> Uni-Processor Cache Coherence Test
    > 0> Base_address = 00000000
    > 0> UltraSPARC-2 Prefetch Instructions Test
    > 0> SRAM Mode = 22, Clock Mode = 3:1, ELIM = 3, PCON = 0f7, MCAP = 13
    > 0> Ecache Size Limited to 00200000; 000006b6.3dc0803b
    > 0>
    > << POST COMPLETE >>
    > 0>**Entering OBP (3b)
    >
    >
    > Power On Selftest Completed
    > Status = 0000.0000.0000.0000 0000.01ff.f007.87e0 1f66.0000.01c1.0105
    >
    > Software Power ON
    >
    > Master CPU online
    > Slave-Offline!
    > Slave Offline, disabled
    >
    > @(#) Sun Ultra 2 UPA/SBus 3.11 Version 2 created 1997/12/05 10:25
    > Clearing DTAGS Done
    > Probing Memory Done
    > MEM BASE = 0000.0000.2000.0000
    > MEM SIZE = 0000.0000.0800.0000
    > MMUs ON
    > Copy Done
    > PC = 0000.01ff.f000.2c30
    > PC = 0000.0000.0000.2c74
    > Decompressing into Memory Done
    > Size = 0000.0000.0006.7730
    > ttya initialized
    > SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
    > Probing Memory Bank #0 32 32 32 32 : 128 Megabytes
    > Probing Memory Bank #1 32 32 32 32 : 128 Megabytes
    > Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
    > Probing Memory Bank #3 0 0 0 0 : 0 Megabytes
    > Probing UPA Slot at 1e,0 Nothing there
    > Probing /sbus@1f,0 at e,0 SUNW,fas sd st SUNW,hme SUNW,bpp
    > Probing /sbus@1f,0 at 0,0 cgsix
    > Probing /sbus@1f,0 at 1,0 EBS,sbs370 EBS,si64
    > Probing /sbus@1f,0 at 2,0 Nothing there
    > Probing /sbus@1f,0 at 3,0 Nothing there
    >




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