Meaning of PPS flag2 -- assert/clear - NTP

This is a discussion on Meaning of PPS flag2 -- assert/clear - NTP ; I seem to remember there was a message about this a couple of months ago, but I can't find it now. Can someone tell me definitively the electrical meaning of pps driver flag2? More precisely, how should flag2 be set ...

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Thread: Meaning of PPS flag2 -- assert/clear

  1. Meaning of PPS flag2 -- assert/clear

    I seem to remember there was a message about this a couple of months
    ago, but I can't find it now.

    Can someone tell me definitively the electrical meaning of pps driver
    flag2? More precisely, how should flag2 be set for:

    1. Signal on DCD line normally high, going low at the on-time mark

    2. Signal on DCD line normally low, going high at the on-time mark

    In each case, it's the initial transition that's on-time; the trailing
    edge of the pulse is not precise.

    Thanks,

    John
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  2. Re: Meaning of PPS flag2 -- assert/clear


    >Can someone tell me definitively the electrical meaning of pps driver
    >flag2? More precisely, how should flag2 be set for:
    >
    >1. Signal on DCD line normally high, going low at the on-time mark
    >
    >2. Signal on DCD line normally low, going high at the on-time mark


    RS-232 is upside down, so "assert" means low.

    So the normal case triggers on a falling edge and the
    "flag2 1" case triggers on the rising edge.



    >In each case, it's the initial transition that's on-time; the trailing
    >edge of the pulse is not precise.


    Years ago, my Z3801A was off a few 10s of uSec relative to a NMEA
    receiver. The pulse is 20 uSec wide. Things got happier after I added
    the "flag2 1" to my config file.

    It's possible my mods to the Z3801A are different from what others
    are using. I'm pretty sure I copied Jeff Mock's drections, but of
    course I made a few "improvements". I think they were all physical
    rather than logical.

    On a scope, my pulse is normally low, going high for 20 uSec.
    (I'm actually standing on my head because the easy place to get
    a scope probe is before a RS-232 driver. So I could easily have
    something inverted.)

    Looks like my comment in
    http://ntp.isc.org/bin/view/Support/...3801ARefclocks
    is backwards/confusing. Sigh.

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  3. Re: Meaning of PPS flag2 -- assert/clear

    Hal Murray said the following on 10/07/2006 12:07 AM:

    > It's possible my mods to the Z3801A are different from what others
    > are using. I'm pretty sure I copied Jeff Mock's drections, but of
    > course I made a few "improvements". I think they were all physical
    > rather than logical.
    >
    > On a scope, my pulse is normally low, going high for 20 uSec.
    > (I'm actually standing on my head because the easy place to get
    > a scope probe is before a RS-232 driver. So I could easily have
    > something inverted.)


    On my Z3801A, with this part of the mod done per Jeff's page and
    measuring the signal on the RS-232 wire using a breakout box, the DCD
    line is normally high and goes low for 20us; that's what I would
    consider "normal" RS-232 behavior, though most PPS sources are just the
    opposite since they're using a positive going pulse.

    By the way, I have my own mods page for the Z3801A at
    http://www.febo.com/time-freq/gps/z3...ods/index.html.

    John

    > Looks like my comment in
    > http://ntp.isc.org/bin/view/Support/...3801ARefclocks
    > is backwards/confusing. Sigh.
    >


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  4. Re: Meaning of PPS flag2 -- assert/clear


    >On my Z3801A, with this part of the mod done per Jeff's page and
    >measuring the signal on the RS-232 wire using a breakout box, the DCD
    >line is normally high and goes low for 20us; that's what I would
    >consider "normal" RS-232 behavior, though most PPS sources are just the
    >opposite since they're using a positive going pulse.


    I screwed up. Sigh/sorry. I had the scope probes on the other
    side of an inverter from my brain. So turn everything I said
    upside down.

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    The suespammers.org mail server is located in California. So are all my
    other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited
    commercial e-mail to my suespammers.org address or any of my other addresses.
    These are my opinions, not necessarily my employer's. I hate spam.


  5. Re: Meaning of PPS flag2 -- assert/clear

    John,

    In RS-232 terms:

    Assert = Positive Voltage = logic 0
    Clear = Negative Voltage = logic 1

    The only reason I mention the logic 0 & 1 is because in TTL terms it's
    backwards. A logic 0 for a TTL signal is 0 volts, and a logic 1 is ~5
    volts. Many GPS devices that have a PPS output at TTL voltage levels (0
    - 5v) but are RS232 biased. So if you tried to stick like a MAX232 chip
    on there to bring the voltages into the full RS232 voltage levels it
    would end up being upside down. You would need a voltage inverter to
    flip it back. It's best just to leave it as-is if the GPS device says
    they are already RS-232 biased.

    Back to your question though...

    flag2 0 = Voltage goes from low to high at the timemark (default)
    flag2 1 = Voltage goes from high to low at the timemark


  6. Re: Meaning of PPS flag2 -- assert/clear

    Thanks, Jason. Interestingly, it's really hard to find a clear answer
    to the definition of "assert" and "clear" on the web.

    One reference I'm looking at now says:

    "
    A low level (–3 to –15 volts) is defined as a logic 1. asserting a logic
    1 or turning on a signal is historically referred to as “marking”.

    A high level (+3 to +15 volts) is defined as a logic 0. Releaseing to
    logic 0 or turning off the signal is referred to as “spacing”.
    "
    (http://www.piclist.com/techref/io/serial/rs232sigs.htm).

    That would indicate that "assert" is going positive-to-negative voltage
    or going from logic 0 to logic 1. By implication "clear" would be the
    opposite, or a negative-to-positive transition. That would indicate the
    opposite of what you said.

    But another reference,
    http://www.camiresearch.com/Data_Com..._standard.html, says

    "
    Pin 8 - Received Line Signal Detector (CD) (also called carrier detect)
    This signal is relevant when the DCE device is a modem. It is asserted
    (logic '0', positive voltage) by the modem when the telephone line is
    "off-hook", a connection has been established, and an answer tone is
    being received from the remote modem. The signal is deasserted when no
    answer tone is being received, or when the answer tone is of inadequate
    quality to meet the local modem's requirements (perhaps due to a noisy
    channel).
    "
    More generally, that reference consistently uses "assert" to mean a
    positive voltage, logic 0. But it doesn't use the term "clear" in that
    context but says "deasserted". I can't vouch for how definitive this
    reference is, but it seems to be thorough and internally consistent, so
    I tend to believe it.

    Based on that definition, your statement is correct. It also seems
    clear that there's plenty of room to get very confused about all this.

    We really need to document this. When I get the strength, I'll try to
    add something to the wiki.

    Thanks!

    John
    ----


    jason@extremeoverclocking.com said the following on 10/15/2006 12:34 PM:
    > John,
    >
    > In RS-232 terms:
    >
    > Assert = Positive Voltage = logic 0
    > Clear = Negative Voltage = logic 1
    >
    > The only reason I mention the logic 0 & 1 is because in TTL terms it's
    > backwards. A logic 0 for a TTL signal is 0 volts, and a logic 1 is ~5
    > volts. Many GPS devices that have a PPS output at TTL voltage levels (0
    > - 5v) but are RS232 biased. So if you tried to stick like a MAX232 chip
    > on there to bring the voltages into the full RS232 voltage levels it
    > would end up being upside down. You would need a voltage inverter to
    > flip it back. It's best just to leave it as-is if the GPS device says
    > they are already RS-232 biased.
    >
    > Back to your question though...
    >
    > flag2 0 = Voltage goes from low to high at the timemark (default)
    > flag2 1 = Voltage goes from high to low at the timemark
    >
    > _______________________________________________
    > questions mailing list
    > questions@lists.ntp.isc.org
    > https://lists.ntp.isc.org/mailman/listinfo/questions
    >
    >


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  7. Re: Meaning of PPS flag2 -- assert/clear

    Hi,

    RS232 signal sense is ( viewing pos voltage as H) :
    notRX
    notTX
    RTS
    CTS
    DCD
    DSR

    because RS323 line sense is:
    L +3v.. +23V
    H -12V .. -3V

    an unconnected RS232 Receiver Hardware pulls high (+3V++)
    signaling RX=L and thus (LINE)BREAK if
    this continues longer than one legal frame
    i.e a broken line

    Receivers and Transmitters ( such like MAX232) are inverters
    UART TTL IO signal sense is:
    RX
    TX
    notRTS
    notCTS
    notDCD
    notDSR
    uwe

  8. Re: Meaning of PPS flag2 -- assert/clear

    In article <1daa04-sad.ln1@robert.houseofmax.de>,
    Uwe Klein wrote:

    > an unconnected RS232 Receiver Hardware pulls high (+3V++)
    > signaling RX=L and thus (LINE)BREAK if
    > this continues longer than one legal frame
    > i.e a broken line


    An unconnected RS232 receiver pulls to control signal false, so to data
    mark. It's current loop interfaces that fail to spacing. That may
    well be why the data is inverted with respect to the controls.

    Part of the cofusion here is that assert only applies to the control
    signals, so, if you try and use it for data, you do end up with
    0 being the asserted state!


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