issues of porting minix3 to issues - Minix

This is a discussion on issues of porting minix3 to issues - Minix ; Hi all: I search many materials and now make the conclusion: minix needs MMU when porting it to ARM architecture,since it is a reliavle OS. MMU will supplies hardware access protect. Minix3 needs it even the process is designed carefully. ...

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Thread: issues of porting minix3 to issues

  1. issues of porting minix3 to issues

    Hi all:
    I search many materials and now make the conclusion: minix needs
    MMU when porting it to ARM architecture,since it is a reliavle OS.
    MMU will supplies hardware access protect. Minix3 needs it even the
    process is designed carefully.
    Who have different advice? Let's talk about it!


  2. Re: issues of porting minix3 to issues

    On Feb 25, 4:40 pm, "www.robotspace.biz" wrote:
    > Hi all:
    > I search many materials and now make the conclusion: minix needs
    > MMU when porting it to ARM architecture,since it is a reliavle OS.
    > MMU will supplies hardware access protect. Minix3 needs it even the
    > process is designed carefully.
    > Who have different advice? Let's talk about it!


    MMU has 3 functions:
    1.memory mapping;
    2.memory protection;
    3.CPU mode transfer.

    MPU has 2 functions:
    1.memory protection;
    2.CPU mode transfer.

    Minix3 has no virtual memory, so it does not use memory mapping,. It
    only use memory protection, and CPU mode transfer. It use 2 level of 4
    level.Its most important concept is the kernel and user with different
    levels. it use gate to transfer CPU mode.
    ARM 9 has MMU, ARM 7 has no MMU. But some ARM7 have MPU.
    Whether with or without MMU or MPU, ARM has 7 CPU mode. I think Kernel
    can use superviser mode, user use usr mode. The system call use SWI to
    transfer CPU mode from usr mode to superviser mode.

    Maybe I will go to BJ in May or June. If you have interesting, we can
    discuss the issue more deeply.

    fp




  3. Re: issues of porting minix3 to issues

    On 2月26日, 下午7时43分, "fp_gz" wrote:
    > On Feb 25, 4:40 pm, "www.robotspace.biz" wrote:
    >
    > > Hi all:
    > > I search many materials and now make the conclusion: minix needs
    > > MMU when porting it to ARM architecture,since it is a reliavle OS.
    > > MMU will supplies hardware access protect. Minix3 needs it even the
    > > process is designed carefully.
    > > Who have different advice? Let's talk about it!

    >
    > MMU has 3 functions:
    > 1.memory mapping;
    > 2.memory protection;
    > 3.CPU mode transfer.
    >
    > MPU has 2 functions:
    > 1.memory protection;
    > 2.CPU mode transfer.
    >
    > Minix3 has no virtual memory, so it does not use memory mapping,. It
    > only use memory protection, and CPU mode transfer. It use 2 level of 4
    > level.Its most important concept is the kernel and user with different
    > levels. it use gate to transfer CPU mode.
    > ARM 9 has MMU, ARM 7 has no MMU. But some ARM7 have MPU.
    > Whether with or without MMU or MPU, ARM has 7 CPU mode. I think Kernel
    > can use superviser mode, user use usr mode. The system call use SWI to
    > transfer CPU mode from usr mode to superviser mode.
    >
    > Maybe I will go to BJ in May or June. If you have interesting, we can
    > discuss the issue more deeply.
    >
    > fp


    why does minix3 need MMU when porting it to ARM?

    For a kernal with no user application, little RAM is enough. In
    complete code there is

    swapping functions to meet some large memory demands. It is not
    enough. Remember the rule in

    embedded system: supply as many functions as possible with limited
    resource,so we need

    virtual memory ,we need MMU. What 's more ,it supplies access protect.


  4. Re: issues of porting minix3 to issues

    On Mar 17, 11:57*am, "www.robotspace.biz" wrote:
    > On 2鏈26鏃, 涓嬪崍7鏃43鍒, "fp_gz" wrote:
    >
    >
    >
    >
    >
    > > On Feb 25, 4:40 pm, "www.robotspace.biz" wrote:

    >
    > > > Hi all:
    > > > * * I search many materials and now make the conclusion: minix needs
    > > > MMU when porting it to ARM architecture,since it is a reliavle OS.
    > > > MMU will supplies hardware access protect. Minix3 needs it even the
    > > > process is designed carefully.
    > > > * * Who have different advice? Let's talk about it!

    >
    > > MMU has 3 functions:
    > > 1.memory mapping;
    > > 2.memory protection;
    > > 3.CPU mode transfer.

    >
    > > MPU has 2 functions:
    > > 1.memory protection;
    > > 2.CPU mode transfer.

    >
    > > Minix3 has no virtual memory, so it does not use memory mapping,. It
    > > only use memory protection, and CPU mode transfer. It use 2 level of 4
    > > level.Its most important concept is the kernel and user with different
    > > levels. it use gate to transfer CPU mode.
    > > ARM 9 has MMU, ARM 7 has no MMU. But some ARM7 have MPU.
    > > Whether with or without MMU or MPU, ARM has 7 CPU mode. I think Kernel
    > > can use superviser mode, user use usr mode. The system call use SWI to
    > > transfer CPU mode from usr mode to superviser mode.

    >
    > > Maybe I will go to BJ in May or June. If you have interesting, we can
    > > discuss the issue more deeply.

    >
    > > fp

    >
    > why does minix3 need MMU when porting it to ARM?
    >
    > For a kernal with no user application, little RAM is enough. In
    > complete code there is
    >
    > swapping functions to meet some large memory demands. It is not
    > enough. Remember the rule in
    >
    > embedded system: supply as many functions as possible with limited
    > resource,so we need
    >
    > virtual memory ,we need MMU. What 's more ,it supplies access protect.- Hide quoted text -
    >
    > - Show quoted text -


    if you use VM and swapping, you will have big performance issues.
    VM need memory mapping table, context switch cause memory mapping
    table reload.
    swapping is much worse.
    ARM has FSCE, but nr. of process are limited to 32.


  5. Re: issues of porting minix3 to issues

    On Mar 17, 7:26*pm, "fp_gz" wrote:
    > On Mar 17, 11:57*am, "www.robotspace.biz" wrote:
    >
    >
    >
    >
    >
    > > On 2鏈26鏃, 涓嬪崍7鏃43鍒, "fp_gz" wrote:

    >
    > > > On Feb 25, 4:40 pm, "www.robotspace.biz" wrote:

    >
    > > > > Hi all:
    > > > > * * I search many materials and now make the conclusion: minix needs
    > > > > MMU when porting it to ARM architecture,since it is a reliavle OS.
    > > > > MMU will supplies hardware access protect. Minix3 needs it even the
    > > > > process is designed carefully.
    > > > > * * Who have different advice? Let's talk about it!

    >
    > > > MMU has 3 functions:
    > > > 1.memory mapping;
    > > > 2.memory protection;
    > > > 3.CPU mode transfer.

    >
    > > > MPU has 2 functions:
    > > > 1.memory protection;
    > > > 2.CPU mode transfer.

    >
    > > > Minix3 has no virtual memory, so it does not use memory mapping,. It
    > > > only use memory protection, and CPU mode transfer. It use 2 level of 4
    > > > level.Its most important concept is the kernel and user with different
    > > > levels. it use gate to transfer CPU mode.
    > > > ARM 9 has MMU, ARM 7 has no MMU. But some ARM7 have MPU.
    > > > Whether with or without MMU or MPU, ARM has 7 CPU mode. I think Kernel
    > > > can use superviser mode, user use usr mode. The system call use SWI to
    > > > transfer CPU mode from usr mode to superviser mode.

    >
    > > > Maybe I will go to BJ in May or June. If you have interesting, we can
    > > > discuss the issue more deeply.

    >
    > > > fp

    >
    > > why does minix3 need MMU when porting it to ARM?

    >
    > > For a kernal with no user application, little RAM is enough. In
    > > complete code there is

    >
    > > swapping functions to meet some large memory demands. It is not
    > > enough. Remember the rule in

    >
    > > embedded system: supply as many functions as possible with limited
    > > resource,so we need

    >
    > > virtual memory ,we need MMU. What 's more ,it supplies access protect.-Hide quoted text -

    >
    > > - Show quoted text -

    >
    > if you use VM and swapping, you will have big performance issues.
    > VM need memory mapping table, context switch cause memory mapping
    > table reload.
    > swapping is much worse.
    > ARM has FSCE, but nr. of process are limited to 32.- Hide quoted text -
    >
    > - Show quoted text -


    now Linux 2.6.x began to support no MMU CPU.
    VxWorks support MMU, but not recommend to use MMU in rt-application.


  6. Re: issues of porting minix3 to issues

    > if you use VM and swapping, you will have big performance issues.
    > VM need memory mapping table, context switch cause memory mapping
    > table reload.
    > swapping is much worse.
    > ARM has FSCE, but nr. of process are limited to 32.- 隐藏被引用文字 -
    >
    > - 显示引用的文字


    Large quantity of memory demands is normal for a OS.
    To redue the cost is necessary for a embedded system.
    Performance is relatively unimportant comparing with reliability.
    In short words, the application target of Minix3 is high reliability
    with low cost.


  7. Re: issues of porting minix3 to issues

    On 3月18日, 下午8时25分, "fp_gz" wrote:
    > On Mar 18, 12:42 am, "www.robotspace.biz" wrote:
    >
    > > > if you use VM and swapping, you will have big performance issues.
    > > > VM need memory mapping table, context switch cause memory mapping
    > > > table reload.
    > > > swapping is much worse.
    > > > ARM has FSCE, but nr. of process are limited to 32.- 隐藏被引用文字 -

    >
    > > > - 显示引用的文字

    >
    > > Large quantity of memory demands is normal for a OS.
    > > To redue the cost is necessary for a embedded system.
    > > Performance is relatively unimportant comparing with reliability.
    > > In short words, the application target of Minix3 is high reliability
    > > with low co

    >
    > reliability do not depend on MMU. VxWork is reliability,but they don't
    > use MMU.
    > minx3 does use mmu for memory pretection. the mallocate in minix3 use
    > the gap between date seg and stack seg, not use heap.


    We are focusing on different issues. will you transfer to BJ in coming
    month? We may talk about these issues. Perhaps I will join your team
    ^_^


  8. Re: issues of porting minix3 to issues

    On Mar 18, 10:44*pm, "www.robotspace.biz" wrote:
    > On 3鏈18鏃, 涓嬪崍8鏃25鍒, "fp_gz" wrote:
    >
    >
    >
    >
    >
    > > On Mar 18, 12:42 am, "www.robotspace.biz" wrote:

    >
    > > > > if you use VM and swapping, you will have big performance issues.
    > > > > VM need memory mapping table, context switch cause memory mapping
    > > > > table reload.
    > > > > swapping is much worse.
    > > > > ARM has FSCE, but nr. of process are limited to 32.- 闅愯棌琚紩鐢ㄦ枃* -

    >
    > > > > - 鏄剧ず寮曠敤鐨勬枃*

    >
    > > > Large quantity of memory demands is normal for a OS.
    > > > To redue the cost is *necessary for a embedded system.
    > > > Performance is relatively unimportant comparing with reliability.
    > > > In short words, the application target of Minix3 is high reliability
    > > > with low co

    >
    > > reliability do not depend on MMU. VxWork is reliability锛宐ut they don't
    > > use MMU.
    > > minx3 does use mmu for memory pretection. the mallocate in minix3 use
    > > the gap between date seg and stack seg, not use heap.

    >
    > We are focusing on different issues. will you transfer to BJ in coming
    > month? We may talk about these issues. Perhaps I will join your team
    > ^_^- Hide quoted text -
    >
    > - Show quoted text -


    maybe May, at least June. wish we can meet.


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