This is a discussion on Question on Dirty-Bit Semantics on Intel x86-32 architecture - Linux ; Hello All, I'm having a problem I hope somebody in the list can help me with. I want to be able to check that a page has been written-to on an intel PIV-Xeon processor. The overall software loop I have ...
I'm having a problem I hope somebody in the list can help me with. I want
to be able to check that a page has been written-to on an intel PIV-Xeon
processor. The overall software
loop I have is as follows:
So I'm periodically checking that the dirty bit is set in the PT.
The problem I'm having is that the dirty bit does not seem to be propogating
to the page-table-entry reliably. Often I will KNOW the page has been
modified but it will show up as clean and vice-versa (I unset the dirty bit
and re-test and it shows up as dirty).
Compiler aliasing issues aside (they're all volatile variables), I was
wondering what the exact semantics are for bit updates to be propagated to
the page-table? All entries are marked as write-back and caching enabled,
and in my current implementation I flush the PTE using the INVLPG
instruction before and after every update or access to the PTE just to make
The intel manuals dont seem to help -- they have information on the bits and
what they mean but not semantics on how propagation occurs to the pte. Any
information (esp from documentation sources) would be much appreciated.