* Alok Kataria wrote:

> Hi,
>
> These patches define a framework for hypervisor detection and
> setting of hypervisor feature bits. We define a
> X86_FEATURE_TSC_RELIABLE bit which is a synthetic bit. This is set
> when running under VMware. This feature bit is used to skip TSC
> checks which can fail on virtualization platform due to timing
> differences when running on virtual cpus.

okay, this looks a lot better structurally - the DMI angle and the
synthetic CPU flag, and the clocksource smarts are all a clean
approach. Peter, any objections?

Ingo
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