[patch 0/9] x86, xsave: xsave/xrstor support - Kernel

This is a discussion on [patch 0/9] x86, xsave: xsave/xrstor support - Kernel ; This patchset adds the support for xsave/xrstor infrastructure for x86. xsave/xrstor manages the existing and future processor extended states in x86 architecutre. More info on xsave/xrstor can be found in the Intel SDM's located at http://www.intel.com/products/proces...uals/index.htm The layout of the ...

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Thread: [patch 0/9] x86, xsave: xsave/xrstor support

  1. [patch 0/9] x86, xsave: xsave/xrstor support

    This patchset adds the support for xsave/xrstor infrastructure for x86.
    xsave/xrstor manages the existing and future processor extended states in x86
    architecutre.

    More info on xsave/xrstor can be found in the Intel SDM's located at
    http://www.intel.com/products/proces...uals/index.htm

    The layout of the xsave/xrstor area extends from the 512-byte FXSAVE/FXRSTOR
    layout. xsave/xrstor area layout consists of:

    - fxsave/fxrstor area (512 bytes)
    - xsave header area (64 bytes)
    - set of save areas, each corresponding to a processor extended state

    The number of save areas, the offset and the size of each save area is
    enumerated by CPUID leaf function 0xd.

    This patch includes the basic xsave/xrstor infrastructure(supporting FP/SSE),
    which includes:
    - context switch support, extending traditional lazy restore mechanism
    - signal handling support, extending(using the software reserved bytes
    464..511 in the current 512byte layout of fxsave frame) the memory
    layout pointed out by the fpstate pointer in the sigcontext

    More details in the patches to follow.

    Signed-off-by: Suresh Siddha
    ---

    --
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  2. [patch 2/9] x86, xsave: enable xsave/xrstor on cpus with xsave support

    Enables xsave/xrstor by turning on cr4.osxsave on cpu's which have
    the xsave support. For now, features that OS supports/enabled are
    FP and SSE.

    Signed-off-by: Suresh Siddha
    ---

    Index: tip-0728/arch/x86/kernel/Makefile
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/Makefile 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/arch/x86/kernel/Makefile 2008-07-29 09:55:46.000000000 -0700
    @@ -39,7 +39,7 @@

    obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
    obj-y += process.o
    -obj-y += i387.o
    +obj-y += i387.o xsave.o
    obj-y += ptrace.o
    obj-y += ds.o
    obj-$(CONFIG_X86_32) += tls.o
    Index: tip-0728/arch/x86/kernel/cpu/common.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/cpu/common.c 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/arch/x86/kernel/cpu/common.c 2008-07-29 09:55:46.000000000 -0700
    @@ -712,6 +712,14 @@
    current_thread_info()->status = 0;
    clear_used_math();
    mxcsr_feature_mask_init();
    +
    + /*
    + * Boot processor to setup the FP and extended state context info.
    + */
    + if (!smp_processor_id())
    + init_thread_xstate();
    +
    + xsave_init();
    }

    #ifdef CONFIG_HOTPLUG_CPU
    Index: tip-0728/arch/x86/kernel/i387.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/i387.c 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/arch/x86/kernel/i387.c 2008-07-29 09:55:46.000000000 -0700
    @@ -61,6 +61,11 @@
    return;
    }

    + if (cpu_has_xsave) {
    + xsave_cntxt_init();
    + return;
    + }
    +
    if (cpu_has_fxsr)
    xstate_size = sizeof(struct i387_fxsave_struct);
    #ifdef CONFIG_X86_32
    @@ -83,6 +88,13 @@

    write_cr0(oldcr0 & ~(X86_CR0_TS|X86_CR0_EM)); /* clear TS and EM */

    + /*
    + * Boot processor to setup the FP and extended state context info.
    + */
    + if (!smp_processor_id())
    + init_thread_xstate();
    + xsave_init();
    +
    mxcsr_feature_mask_init();
    /* clean state in init */
    current_thread_info()->status = 0;
    Index: tip-0728/arch/x86/kernel/traps_64.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/traps_64.c 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/arch/x86/kernel/traps_64.c 2008-07-29 09:55:46.000000000 -0700
    @@ -1186,10 +1186,6 @@
    set_system_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
    #endif
    /*
    - * initialize the per thread extended state:
    - */
    - init_thread_xstate();
    - /*
    * Should be a barrier for any external CPU state:
    */
    cpu_init();
    Index: tip-0728/include/asm-x86/processor-flags.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/processor-flags.h 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/include/asm-x86/processor-flags.h 2008-07-29 09:55:46.000000000 -0700
    @@ -59,6 +59,7 @@
    #define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */
    #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
    #define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */
    +#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */

    /*
    * x86-64 Task Priority Register, CR8
    Index: tip-0728/arch/x86/kernel/xsave.c
    ================================================== =================
    --- /dev/null 1970-01-01 00:00:00.000000000 +0000
    +++ tip-0728/arch/x86/kernel/xsave.c 2008-07-29 09:56:54.000000000 -0700
    @@ -0,0 +1,87 @@
    +/*
    + * xsave/xrstor support.
    + *
    + * Author: Suresh Siddha
    + */
    +#include
    +#include
    +#include
    +
    +/*
    + * Supported feature mask by the CPU and the kernel.
    + */
    +unsigned int pcntxt_hmask, pcntxt_lmask;
    +
    +/*
    + * Represents init state for the supported extended state.
    + */
    +struct xsave_struct *init_xstate_buf;
    +
    +/*
    + * Enable the extended processor state save/restore feature
    + */
    +void __cpuinit xsave_init(void)
    +{
    + if (!cpu_has_xsave)
    + return;
    +
    + set_in_cr4(X86_CR4_OSXSAVE);
    +
    + /*
    + * Enable all the features that the HW is capable of
    + * and the Linux kernel is aware of.
    + *
    + * xsetbv();
    + */
    + asm volatile(".byte 0x0f,0x01,0xd1"::"c" (0),
    + "a" (pcntxt_lmask), "d" (pcntxt_hmask));
    +}
    +
    +/*
    + * setup the xstate image representing the init state
    + */
    +void setup_xstate_init(void)
    +{
    + init_xstate_buf = alloc_bootmem(xstate_size);
    + init_xstate_buf->i387.mxcsr = MXCSR_DEFAULT;
    +}
    +
    +/*
    + * Enable and initialize the xsave feature.
    + */
    +void __init xsave_cntxt_init(void)
    +{
    + unsigned int eax, ebx, ecx, edx;
    +
    + cpuid_count(0xd, 0, &eax, &ebx, &ecx, &edx);
    +
    + pcntxt_lmask = eax;
    + pcntxt_hmask = edx;
    +
    + if ((pcntxt_lmask & XSTATE_FPSSE) != XSTATE_FPSSE) {
    + printk(KERN_ERR "FP/SSE not shown under xsave features %x\n",
    + pcntxt_lmask);
    + BUG();
    + }
    +
    + /*
    + * for now OS knows only about FP/SSE
    + */
    + pcntxt_lmask = pcntxt_lmask & XCNTXT_LMASK;
    + pcntxt_hmask = pcntxt_hmask & XCNTXT_HMASK;
    +
    + xsave_init();
    +
    + /*
    + * Recompute the context size for enabled features
    + */
    + cpuid_count(0xd, 0, &eax, &ebx, &ecx, &edx);
    +
    + xstate_size = ebx;
    +
    + setup_xstate_init();
    +
    + printk(KERN_INFO "xsave/xrstor: enabled xstate_bv 0x%Lx, "
    + "cntxt size 0x%x\n",
    + (pcntxt_lmask | ((u64) pcntxt_hmask << 32)), xstate_size);
    +}
    Index: tip-0728/include/asm-x86/xsave.h
    ================================================== =================
    --- /dev/null 1970-01-01 00:00:00.000000000 +0000
    +++ tip-0728/include/asm-x86/xsave.h 2008-07-29 09:55:46.000000000 -0700
    @@ -0,0 +1,26 @@
    +#ifndef __ASM_X86_XSAVE_H
    +#define __ASM_X86_XSAVE_H
    +
    +#include
    +#include
    +
    +#define XSTATE_FP 0x1
    +#define XSTATE_SSE 0x2
    +
    +#define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
    +
    +#define FXSAVE_SIZE 512
    +
    +/*
    + * These are the features that the OS can handle currently.
    + */
    +#define XCNTXT_LMASK (XSTATE_FP | XSTATE_SSE)
    +#define XCNTXT_HMASK 0x0
    +
    +extern unsigned int xstate_size, pcntxt_hmask, pcntxt_lmask;
    +extern struct xsave_struct *init_xstate_buf;
    +
    +extern void xsave_cntxt_init(void);
    +extern void xsave_init(void);
    +
    +#endif
    Index: tip-0728/arch/x86/kernel/traps_32.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/traps_32.c 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/arch/x86/kernel/traps_32.c 2008-07-29 09:55:46.000000000 -0700
    @@ -1240,7 +1240,6 @@

    set_bit(SYSCALL_VECTOR, used_vectors);

    - init_thread_xstate();
    /*
    * Should be a barrier for any external CPU state:
    */
    Index: tip-0728/include/asm-x86/i387.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/i387.h 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/include/asm-x86/i387.h 2008-07-29 09:55:46.000000000 -0700
    @@ -18,6 +18,7 @@
    #include
    #include
    #include
    +#include

    extern void fpu_init(void);
    extern void mxcsr_feature_mask_init(void);
    Index: tip-0728/include/asm-x86/processor.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/processor.h 2008-07-29 09:55:43.000000000 -0700
    +++ tip-0728/include/asm-x86/processor.h 2008-07-29 09:55:46.000000000 -0700
    @@ -351,6 +351,18 @@
    u32 entry_eip;
    };

    +struct xsave_hdr_struct {
    + u64 xstate_bv;
    + u64 reserved1[2];
    + u64 reserved2[5];
    +} __attribute__((packed));
    +
    +struct xsave_struct {
    + struct i387_fxsave_struct i387;
    + struct xsave_hdr_struct xsave_hdr;
    + /* new processor state extensions will go here */
    +} __attribute__ ((packed, aligned (64)));
    +
    union thread_xstate {
    struct i387_fsave_struct fsave;
    struct i387_fxsave_struct fxsave;

    --

    --
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  3. [patch 5/9] x86, xsave: reorganization of signal save/restore fpstate code layout

    move 64bit routines that saves/restores fpstate in/from user stack from
    signal_64.c to xsave.c

    restore_i387_xstate() now handles the condition when user passes
    NULL fpstate.

    Other misc changes for prepartion of xsave/xrstor sigcontext support.

    Signed-off-by: Suresh Siddha
    ---

    Index: tip-0728/arch/x86/kernel/i387.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/i387.c 2008-07-28 18:31:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/i387.c 2008-07-28 18:37:20.000000000 -0700
    @@ -21,9 +21,10 @@
    # include
    # include
    #else
    -# define save_i387_ia32 save_i387
    -# define restore_i387_ia32 restore_i387
    +# define save_i387_xstate_ia32 save_i387_xstate
    +# define restore_i387_xstate_ia32 restore_i387_xstate
    # define _fpstate_ia32 _fpstate
    +# define _xstate_ia32 _xstate
    # define sig_xstate_ia32_size sig_xstate_size
    # define user_i387_ia32_struct user_i387_struct
    # define user32_fxsr_struct user_fxsr_struct
    @@ -424,7 +425,6 @@
    struct task_struct *tsk = current;
    struct i387_fsave_struct *fp = &tsk->thread.xstate->fsave;

    - unlazy_fpu(tsk);
    fp->status = fp->swd;
    if (__copy_to_user(buf, fp, sizeof(struct i387_fsave_struct)))
    return -1;
    @@ -438,8 +438,6 @@
    struct user_i387_ia32_struct env;
    int err = 0;

    - unlazy_fpu(tsk);
    -
    convert_from_fxsr(&env, tsk);
    if (__copy_to_user(buf, &env, sizeof(env)))
    return -1;
    @@ -455,10 +453,16 @@
    return 1;
    }

    -int save_i387_ia32(struct _fpstate_ia32 __user *buf)
    +int save_i387_xstate_ia32(void __user *buf)
    {
    + struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;
    + struct task_struct *tsk = current;
    +
    if (!used_math())
    return 0;
    +
    + if (!access_ok(VERIFY_WRITE, buf, sig_xstate_ia32_size))
    + return -EACCES;
    /*
    * This will cause a "finit" to be triggered by the next
    * attempted FPU operation by the 'current' process.
    @@ -468,13 +472,15 @@
    if (!HAVE_HWFP) {
    return fpregs_soft_get(current, NULL,
    0, sizeof(struct user_i387_ia32_struct),
    - NULL, buf) ? -1 : 1;
    + NULL, fp) ? -1 : 1;
    }

    + unlazy_fpu(tsk);
    +
    if (cpu_has_fxsr)
    - return save_i387_fxsave(buf);
    + return save_i387_fxsave(fp);
    else
    - return save_i387_fsave(buf);
    + return save_i387_fsave(fp);
    }

    static inline int restore_i387_fsave(struct _fpstate_ia32 __user *buf)
    @@ -502,14 +508,26 @@
    return 0;
    }

    -int restore_i387_ia32(struct _fpstate_ia32 __user *buf)
    +int restore_i387_xstate_ia32(void __user *buf)
    {
    int err;
    struct task_struct *tsk = current;
    + struct _fpstate_ia32 __user *fp = (struct _fpstate_ia32 __user *) buf;

    if (HAVE_HWFP)
    clear_fpu(tsk);

    + if (!buf) {
    + if (used_math()) {
    + clear_fpu(tsk);
    + clear_used_math();
    + }
    +
    + return 0;
    + } else
    + if (!access_ok(VERIFY_READ, buf, sig_xstate_ia32_size))
    + return -EACCES;
    +
    if (!used_math()) {
    err = init_fpu(tsk);
    if (err)
    @@ -518,13 +536,13 @@

    if (HAVE_HWFP) {
    if (cpu_has_fxsr)
    - err = restore_i387_fxsave(buf);
    + err = restore_i387_fxsave(fp);
    else
    - err = restore_i387_fsave(buf);
    + err = restore_i387_fsave(fp);
    } else {
    err = fpregs_soft_set(current, NULL,
    0, sizeof(struct user_i387_ia32_struct),
    - NULL, buf) != 0;
    + NULL, fp) != 0;
    }
    set_used_math();

    Index: tip-0728/arch/x86/kernel/xsave.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/xsave.c 2008-07-28 18:31:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/xsave.c 2008-07-28 18:37:20.000000000 -0700
    @@ -12,6 +12,85 @@
    */
    unsigned int pcntxt_hmask, pcntxt_lmask;

    +#ifdef CONFIG_X86_64
    +/*
    + * Signal frame handlers.
    + */
    +
    +int save_i387_xstate(void __user *buf)
    +{
    + struct task_struct *tsk = current;
    + int err = 0;
    +
    + if (!access_ok(VERIFY_WRITE, buf, sig_xstate_size))
    + return -EACCES;
    +
    + BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
    + sizeof(tsk->thread.xstate->fxsave));
    +
    + if ((unsigned long)buf % 16)
    + printk("save_i387_xstate: bad fpstate %p\n", buf);
    +
    + if (!used_math())
    + return 0;
    + clear_used_math(); /* trigger finit */
    + if (task_thread_info(tsk)->status & TS_USEDFPU) {
    + err = save_i387_checking((struct i387_fxsave_struct __user *)
    + buf);
    + if (err)
    + return err;
    + task_thread_info(tsk)->status &= ~TS_USEDFPU;
    + stts();
    + } else {
    + if (__copy_to_user(buf, &tsk->thread.xstate->fxsave,
    + xstate_size))
    + return -1;
    + }
    + return 1;
    +}
    +
    +/*
    + * This restores directly out of user space. Exceptions are handled.
    + */
    +int restore_i387_xstate(void __user *buf)
    +{
    + struct task_struct *tsk = current;
    + int err;
    +
    + if (!buf) {
    + if (used_math()) {
    + clear_fpu(tsk);
    + clear_used_math();
    + }
    +
    + return 0;
    + } else
    + if (!access_ok(VERIFY_READ, buf, sig_xstate_size))
    + return -EACCES;
    +
    + if (!used_math()) {
    + err = init_fpu(tsk);
    + if (err)
    + return err;
    + }
    +
    + if (!(task_thread_info(current)->status & TS_USEDFPU)) {
    + clts();
    + task_thread_info(current)->status |= TS_USEDFPU;
    + }
    + err = fxrstor_checking((__force struct i387_fxsave_struct *)buf);
    + if (unlikely(err)) {
    + /*
    + * Encountered an error while doing the restore from the
    + * user buffer, clear the fpu state.
    + */
    + clear_fpu(tsk);
    + clear_used_math();
    + }
    + return err;
    +}
    +#endif
    +
    /*
    * Represents init state for the supported extended state.
    */
    Index: tip-0728/include/asm-x86/i387.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/i387.h 2008-07-28 18:31:15.000000000 -0700
    +++ tip-0728/include/asm-x86/i387.h 2008-07-28 18:37:20.000000000 -0700
    @@ -35,8 +35,9 @@
    #ifdef CONFIG_IA32_EMULATION
    extern unsigned int sig_xstate_ia32_size;
    struct _fpstate_ia32;
    -extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
    -extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
    +struct _xstate_ia32;
    +extern int save_i387_xstate_ia32(void __user *buf);
    +extern int restore_i387_xstate_ia32(void __user *buf);
    #endif

    #define X87_FSW_ES (1 << 7) /* Exception Summary */
    @@ -250,13 +251,13 @@
    task_thread_info(tsk)->status &= ~TS_USEDFPU;
    }

    +#endif /* CONFIG_X86_64 */
    +
    /*
    * Signal frame handlers...
    */
    -extern int save_i387(struct _fpstate __user *buf);
    -extern int restore_i387(struct _fpstate __user *buf);
    -
    -#endif /* CONFIG_X86_64 */
    +extern int save_i387_xstate(void __user *buf);
    +extern int restore_i387_xstate(void __user *buf);

    static inline void __unlazy_fpu(struct task_struct *tsk)
    {
    Index: tip-0728/arch/x86/ia32/ia32_signal.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/ia32/ia32_signal.c 2008-07-28 18:35:50.000000000 -0700
    +++ tip-0728/arch/x86/ia32/ia32_signal.c 2008-07-28 18:38:04.000000000 -0700
    @@ -216,7 +216,7 @@
    unsigned int *peax)
    {
    unsigned int tmpflags, gs, oldgs, err = 0;
    - struct _fpstate_ia32 __user *buf;
    + void __user *buf;
    u32 tmp;

    /* Always make any pending restarted system calls return -EINTR */
    @@ -260,26 +260,12 @@

    err |= __get_user(tmp, &sc->fpstate);
    buf = compat_ptr(tmp);
    - if (buf) {
    - if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
    - goto badframe;
    - err |= restore_i387_ia32(buf);
    - } else {
    - struct task_struct *me = current;
    -
    - if (used_math()) {
    - clear_fpu(me);
    - clear_used_math();
    - }
    - }
    + err |= restore_i387_xstate_ia32(buf);

    err |= __get_user(tmp, &sc->ax);
    *peax = tmp;

    return err;
    -
    -badframe:
    - return 1;
    }

    asmlinkage long sys32_sigreturn(struct pt_regs *regs)
    @@ -351,7 +337,7 @@
    */

    static int ia32_setup_sigcontext(struct sigcontext_ia32 __user *sc,
    - struct _fpstate_ia32 __user *fpstate,
    + void __user *fpstate,
    struct pt_regs *regs, unsigned int mask)
    {
    int tmp, err = 0;
    @@ -382,7 +368,7 @@
    err |= __put_user((u32)regs->flags, &sc->flags);
    err |= __put_user((u32)regs->sp, &sc->sp_at_signal);

    - tmp = save_i387_ia32(fpstate);
    + tmp = save_i387_xstate_ia32(fpstate);
    if (tmp < 0)
    err = -EFAULT;
    else {
    @@ -404,7 +390,7 @@
    */
    static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
    size_t frame_size,
    - struct _fpstate_ia32 **fpstate)
    + void **fpstate)
    {
    unsigned long sp;

    @@ -441,7 +427,7 @@
    struct sigframe __user *frame;
    void __user *restorer;
    int err = 0;
    - struct _fpstate_ia32 __user *fpstate = NULL;
    + void __user *fpstate = NULL;

    /* copy_to_user optimizes that into a single 8 byte store */
    static const struct {
    @@ -529,7 +515,7 @@
    struct rt_sigframe __user *frame;
    void __user *restorer;
    int err = 0;
    - struct _fpstate_ia32 __user *fpstate = NULL;
    + void __user *fpstate = NULL;

    /* __copy_to_user optimizes that into a single 8 byte store */
    static const struct {
    Index: tip-0728/arch/x86/kernel/signal_32.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/signal_32.c 2008-07-28 18:34:54.000000000 -0700
    +++ tip-0728/arch/x86/kernel/signal_32.c 2008-07-28 18:37:20.000000000 -0700
    @@ -161,28 +161,14 @@
    }

    {
    - struct _fpstate __user *buf;
    + void __user *buf;

    err |= __get_user(buf, &sc->fpstate);
    - if (buf) {
    - if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
    - goto badframe;
    - err |= restore_i387(buf);
    - } else {
    - struct task_struct *me = current;
    -
    - if (used_math()) {
    - clear_fpu(me);
    - clear_used_math();
    - }
    - }
    + err |= restore_i387_xstate(buf);
    }

    err |= __get_user(*pax, &sc->ax);
    return err;
    -
    -badframe:
    - return 1;
    }

    asmlinkage unsigned long sys_sigreturn(unsigned long __unused)
    @@ -264,7 +250,7 @@
    * Set up a signal frame.
    */
    static int
    -setup_sigcontext(struct sigcontext __user *sc, struct _fpstate __user *fpstate,
    +setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate,
    struct pt_regs *regs, unsigned long mask)
    {
    int tmp, err = 0;
    @@ -291,7 +277,7 @@
    err |= __put_user(regs->sp, &sc->sp_at_signal);
    err |= __put_user(regs->ss, (unsigned int __user *)&sc->ss);

    - tmp = save_i387(fpstate);
    + tmp = save_i387_xstate(fpstate);
    if (tmp < 0)
    err = 1;
    else
    @@ -309,7 +295,7 @@
    */
    static inline void __user *
    get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
    - struct _fpstate **fpstate)
    + void **fpstate)
    {
    unsigned long sp;

    @@ -358,7 +344,7 @@
    void __user *restorer;
    int err = 0;
    int usig;
    - struct _fpstate __user *fpstate = NULL;
    + void __user *fpstate = NULL;

    frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    @@ -436,7 +422,7 @@
    void __user *restorer;
    int err = 0;
    int usig;
    - struct _fpstate __user *fpstate = NULL;
    + void __user *fpstate = NULL;

    frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    Index: tip-0728/arch/x86/kernel/signal_64.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/signal_64.c 2008-07-28 18:31:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/signal_64.c 2008-07-28 18:37:20.000000000 -0700
    @@ -57,69 +57,6 @@
    }

    /*
    - * Signal frame handlers.
    - */
    -
    -static inline int save_i387(struct _fpstate __user *buf)
    -{
    - struct task_struct *tsk = current;
    - int err = 0;
    -
    - BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
    - sizeof(tsk->thread.xstate->fxsave));
    -
    - if ((unsigned long)buf % 16)
    - printk("save_i387: bad fpstate %p\n", buf);
    -
    - if (!used_math())
    - return 0;
    - clear_used_math(); /* trigger finit */
    - if (task_thread_info(tsk)->status & TS_USEDFPU) {
    - err = save_i387_checking((struct i387_fxsave_struct __user *)
    - buf);
    - if (err)
    - return err;
    - task_thread_info(tsk)->status &= ~TS_USEDFPU;
    - stts();
    - } else {
    - if (__copy_to_user(buf, &tsk->thread.xstate->fxsave,
    - sizeof(struct i387_fxsave_struct)))
    - return -1;
    - }
    - return 1;
    -}
    -
    -/*
    - * This restores directly out of user space. Exceptions are handled.
    - */
    -static inline int restore_i387(struct _fpstate __user *buf)
    -{
    - struct task_struct *tsk = current;
    - int err;
    -
    - if (!used_math()) {
    - err = init_fpu(tsk);
    - if (err)
    - return err;
    - }
    -
    - if (!(task_thread_info(current)->status & TS_USEDFPU)) {
    - clts();
    - task_thread_info(current)->status |= TS_USEDFPU;
    - }
    - err = restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
    - if (unlikely(err)) {
    - /*
    - * Encountered an error while doing the restore from the
    - * user buffer, clear the fpu state.
    - */
    - clear_fpu(tsk);
    - clear_used_math();
    - }
    - return err;
    -}
    -
    -/*
    * Do a signal return; undo the signal stack.
    */
    static int
    @@ -163,25 +100,11 @@
    {
    struct _fpstate __user * buf;
    err |= __get_user(buf, &sc->fpstate);
    -
    - if (buf) {
    - if (!access_ok(VERIFY_READ, buf, sizeof(*buf)))
    - goto badframe;
    - err |= restore_i387(buf);
    - } else {
    - struct task_struct *me = current;
    - if (used_math()) {
    - clear_fpu(me);
    - clear_used_math();
    - }
    - }
    + err |= restore_i387_xstate(buf);
    }

    err |= __get_user(*pax, &sc->ax);
    return err;
    -
    -badframe:
    - return 1;
    }

    asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
    @@ -279,7 +202,7 @@
    sigset_t *set, struct pt_regs * regs)
    {
    struct rt_sigframe __user *frame;
    - struct _fpstate __user *fp = NULL;
    + void __user *fp = NULL;
    int err = 0;
    struct task_struct *me = current;

    @@ -291,7 +214,7 @@
    if (!access_ok(VERIFY_WRITE, fp, sizeof(struct _fpstate)))
    goto give_sigsegv;

    - if (save_i387(fp) < 0)
    + if (save_i387_xstate(fp) < 0)
    err |= -1;
    } else
    frame = get_stack(ka, regs, sizeof(struct rt_sigframe)) - 8;

    --

    --
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  4. [patch 3/9] x86, xsave: context switch support using xsave/xrstor

    Uses xsave/xrstor (instead of traditional fxsave/fxrstor) in context switch
    when available.

    Introduces TS_XSAVE flag, which determine the need to use xsave/xrstor
    instructions during context switch instead of the legacy fxsave/fxrstor
    instructions. Thread-synchronous status word is already in L1 cache during
    this code patch and thus minimizes the performance penality compared to
    (cpu_has_xsave) checks.

    Signed-off-by: Suresh Siddha
    ---

    Index: tip-0728/arch/x86/kernel/cpu/common.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/cpu/common.c 2008-07-28 18:23:14.000000000 -0700
    +++ tip-0728/arch/x86/kernel/cpu/common.c 2008-07-28 18:27:28.000000000 -0700
    @@ -709,7 +709,10 @@
    /*
    * Force FPU initialization:
    */
    - current_thread_info()->status = 0;
    + if (cpu_has_xsave)
    + current_thread_info()->status = TS_XSAVE;
    + else
    + current_thread_info()->status = 0;
    clear_used_math();
    mxcsr_feature_mask_init();

    Index: tip-0728/arch/x86/kernel/i387.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/i387.c 2008-07-28 18:23:45.000000000 -0700
    +++ tip-0728/arch/x86/kernel/i387.c 2008-07-28 18:27:28.000000000 -0700
    @@ -97,7 +97,10 @@

    mxcsr_feature_mask_init();
    /* clean state in init */
    - current_thread_info()->status = 0;
    + if (cpu_has_xsave)
    + current_thread_info()->status = TS_XSAVE;
    + else
    + current_thread_info()->status = 0;
    clear_used_math();
    }
    #endif /* CONFIG_X86_64 */
    Index: tip-0728/include/asm-x86/i387.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/i387.h 2008-07-28 18:23:14.000000000 -0700
    +++ tip-0728/include/asm-x86/i387.h 2008-07-28 18:27:28.000000000 -0700
    @@ -37,6 +37,8 @@
    extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
    #endif

    +#define X87_FSW_ES (1 << 7) /* Exception Summary */
    +
    #ifdef CONFIG_X86_64

    /* Ignore delayed exceptions from user space */
    @@ -47,7 +49,7 @@
    _ASM_EXTABLE(1b, 2b));
    }

    -static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
    +static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
    {
    int err;

    @@ -67,15 +69,31 @@
    return err;
    }

    -#define X87_FSW_ES (1 << 7) /* Exception Summary */
    +static inline int restore_fpu_checking(struct task_struct *tsk)
    +{
    + if (task_thread_info(tsk)->status & TS_XSAVE)
    + return xrstor_checking(&tsk->thread.xstate->xsave);
    + else
    + return fxrstor_checking(&tsk->thread.xstate->fxsave);
    +}

    /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
    is pending. Clear the x87 state here by setting it to fixed
    values. The kernel data segment can be sometimes 0 and sometimes
    new user value. Both should be ok.
    Use the PDA as safe address because it should be already in L1. */
    -static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
    +static inline void clear_fpu_state(struct task_struct *tsk)
    {
    + struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
    + struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
    +
    + /*
    + * xsave header may indicate the init state of the FP.
    + */
    + if ((task_thread_info(tsk)->status & TS_XSAVE) &&
    + !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
    + return;
    +
    if (unlikely(fx->swd & X87_FSW_ES))
    asm volatile("fnclex");
    alternative_input(ASM_NOP8 ASM_NOP2,
    @@ -108,7 +126,7 @@
    return err;
    }

    -static inline void __save_init_fpu(struct task_struct *tsk)
    +static inline void fxsave(struct task_struct *tsk)
    {
    /* Using "rex64; fxsave %0" is broken because, if the memory operand
    uses any extended registers for addressing, a second REX prefix
    @@ -133,7 +151,16 @@
    : "=m" (tsk->thread.xstate->fxsave)
    : "cdaSDb" (&tsk->thread.xstate->fxsave));
    #endif
    - clear_fpu_state(&tsk->thread.xstate->fxsave);
    +}
    +
    +static inline void __save_init_fpu(struct task_struct *tsk)
    +{
    + if (task_thread_info(tsk)->status & TS_XSAVE)
    + xsave(tsk);
    + else
    + fxsave(tsk);
    +
    + clear_fpu_state(tsk);
    task_thread_info(tsk)->status &= ~TS_USEDFPU;
    }

    @@ -148,6 +175,10 @@

    static inline void restore_fpu(struct task_struct *tsk)
    {
    + if (task_thread_info(tsk)->status & TS_XSAVE) {
    + xrstor_checking(&tsk->thread.xstate->xsave);
    + return;
    + }
    /*
    * The "nop" is needed to make the instructions the same
    * length.
    @@ -173,6 +204,27 @@
    */
    static inline void __save_init_fpu(struct task_struct *tsk)
    {
    + if (task_thread_info(tsk)->status & TS_XSAVE) {
    + struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
    + struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
    +
    + xsave(tsk);
    +
    + /*
    + * xsave header may indicate the init state of the FP.
    + */
    + if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
    + goto end;
    +
    + if (unlikely(fx->swd & X87_FSW_ES))
    + asm volatile("fnclex");
    +
    + /*
    + * we can do a simple return here or be paranoid
    + */
    + goto clear_state;
    + }
    +
    /* Use more nops than strictly needed in case the compiler
    varies code */
    alternative_input(
    @@ -182,6 +234,7 @@
    X86_FEATURE_FXSR,
    [fx] "m" (tsk->thread.xstate->fxsave),
    [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
    +clear_state:
    /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
    is pending. Clear the x87 state here by setting it to fixed
    values. safe_address is a random variable that should be in L1 */
    @@ -191,6 +244,7 @@
    "fildl %[addr]", /* set F?P to defined value */
    X86_FEATURE_FXSAVE_LEAK,
    [addr] "m" (safe_address));
    +end:
    task_thread_info(tsk)->status &= ~TS_USEDFPU;
    }

    Index: tip-0728/include/asm-x86/processor.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/processor.h 2008-07-28 18:23:14.000000000 -0700
    +++ tip-0728/include/asm-x86/processor.h 2008-07-28 18:27:28.000000000 -0700
    @@ -367,6 +367,7 @@
    struct i387_fsave_struct fsave;
    struct i387_fxsave_struct fxsave;
    struct i387_soft_struct soft;
    + struct xsave_struct xsave;
    };

    #ifdef CONFIG_X86_64
    Index: tip-0728/include/asm-x86/thread_info.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/thread_info.h 2008-07-28 18:20:15.000000000 -0700
    +++ tip-0728/include/asm-x86/thread_info.h 2008-07-28 18:27:28.000000000 -0700
    @@ -241,6 +241,7 @@
    #define TS_POLLING 0x0004 /* true if in idle loop
    and not sleeping */
    #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */
    +#define TS_XSAVE 0x0010 /* Use xsave/xrstor */

    #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING)

    Index: tip-0728/include/asm-x86/xsave.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/xsave.h 2008-07-28 18:23:14.000000000 -0700
    +++ tip-0728/include/asm-x86/xsave.h 2008-07-28 18:27:28.000000000 -0700
    @@ -17,10 +17,43 @@
    #define XCNTXT_LMASK (XSTATE_FP | XSTATE_SSE)
    #define XCNTXT_HMASK 0x0

    +#ifdef CONFIG_X86_64
    +#define REX_PREFIX "0x48, "
    +#else
    +#define REX_PREFIX
    +#endif
    +
    extern unsigned int xstate_size, pcntxt_hmask, pcntxt_lmask;
    extern struct xsave_struct *init_xstate_buf;

    extern void xsave_cntxt_init(void);
    extern void xsave_init(void);
    +extern int init_fpu(struct task_struct *child);
    +
    +static inline int xrstor_checking(struct xsave_struct *fx)
    +{
    + int err;
    +
    + asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
    + "2:\n"
    + ".section .fixup,\"ax\"\n"
    + "3: movl $-1,%[err]\n"
    + " jmp 2b\n"
    + ".previous\n"
    + _ASM_EXTABLE(1b, 3b)
    + : [err] "=r" (err)
    + : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
    + : "memory");
    +
    + return err;
    +}

    +static inline void xsave(struct task_struct *tsk)
    +{
    + /* This, however, we can work around by forcing the compiler to select
    + an addressing mode that doesn't require extended registers. */
    + __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
    + ::"D" (&(tsk->thread.xstate->xsave)),
    + "a" (-1), "d"(-1) : "memory");
    +}
    #endif
    Index: tip-0728/arch/x86/kernel/traps_64.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/traps_64.c 2008-07-28 18:23:14.000000000 -0700
    +++ tip-0728/arch/x86/kernel/traps_64.c 2008-07-28 18:27:28.000000000 -0700
    @@ -1147,7 +1147,7 @@
    /*
    * Paranoid restore. send a SIGSEGV if we fail to restore the state.
    */
    - if (unlikely(restore_fpu_checking(&me->thread.xstate->fxsave))) {
    + if (unlikely(restore_fpu_checking(me))) {
    stts();
    force_sig(SIGSEGV, me);
    return;

    --

    --
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  5. [patch 1/9] x86, xsave: xsave cpuid feature bits

    Signed-off-by: Suresh Siddha
    ---

    Index: tip-0728/arch/x86/kernel/cpu/feature_names.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/cpu/feature_names.c 2008-07-28 18:19:50.000000000 -0700
    +++ tip-0728/arch/x86/kernel/cpu/feature_names.c 2008-07-28 18:19:53.000000000 -0700
    @@ -46,7 +46,7 @@
    "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
    "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
    NULL, NULL, "dca", "sse4_1", "sse4_2", "x2apic", NULL, "popcnt",
    - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    + NULL, NULL, "xsave", NULL, NULL, NULL, NULL, NULL,

    /* VIA/Cyrix/Centaur-defined */
    NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
    Index: tip-0728/include/asm-x86/cpufeature.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/cpufeature.h 2008-07-28 18:19:50.000000000 -0700
    +++ tip-0728/include/asm-x86/cpufeature.h 2008-07-28 18:19:53.000000000 -0700
    @@ -92,6 +92,7 @@
    #define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
    #define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
    #define X86_FEATURE_X2APIC (4*32+21) /* x2APIC */
    +#define X86_FEATURE_XSAVE (4*32+26) /* XSAVE */

    /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
    #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
    @@ -191,6 +192,7 @@
    #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
    #define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
    #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC)
    +#define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE)

    #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
    # define cpu_has_invlpg 1

    --

    --
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  6. [patch 4/9] x86, xsave: dynamically allocate sigframes fpstate instead of static allocation

    dynamically allocate fpstate on the stack, instead of static allocation
    in the current sigframe layout on the user stack. This will allow the
    fpstate structure to grow in the future, which includes extended state
    information supporting xsave/xrstor.

    signal handlers will be able to access the fpstate pointer from the
    sigcontext structure asusual, with no change. For the non RT sigframe's
    (which are supported only for 32bit apps), current static fpstate layout
    in the sigframe will be unused(so that we don't change the extramask[]
    offset in the sigframe and thus prevent breaking app's which modify
    extramask[]).

    Signed-off-by: Suresh Siddha
    ---

    Index: tip-0728/arch/x86/ia32/ia32_signal.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/ia32/ia32_signal.c 2008-07-28 18:20:15.000000000 -0700
    +++ tip-0728/arch/x86/ia32/ia32_signal.c 2008-07-28 18:35:50.000000000 -0700
    @@ -179,9 +179,10 @@
    u32 pretcode;
    int sig;
    struct sigcontext_ia32 sc;
    - struct _fpstate_ia32 fpstate;
    + struct _fpstate_ia32 fpstate_unused; /* look at kernel/sigframe.h */
    unsigned int extramask[_COMPAT_NSIG_WORDS-1];
    char retcode[8];
    + /* fp state follows here */
    };

    struct rt_sigframe
    @@ -192,8 +193,8 @@
    u32 puc;
    compat_siginfo_t info;
    struct ucontext_ia32 uc;
    - struct _fpstate_ia32 fpstate;
    char retcode[8];
    + /* fp state follows here */
    };

    #define COPY(x) { \
    @@ -402,7 +403,8 @@
    * Determine which stack to use..
    */
    static void __user *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs,
    - size_t frame_size)
    + size_t frame_size,
    + struct _fpstate_ia32 **fpstate)
    {
    unsigned long sp;

    @@ -421,6 +423,11 @@
    ka->sa.sa_restorer)
    sp = (unsigned long) ka->sa.sa_restorer;

    + if (used_math()) {
    + sp = sp - sig_xstate_ia32_size;
    + *fpstate = (struct _fpstate_ia32 *) sp;
    + }
    +
    sp -= frame_size;
    /* Align the stack pointer according to the i386 ABI,
    * i.e. so that on function entry ((sp + 4) & 15) == 0. */
    @@ -434,6 +441,7 @@
    struct sigframe __user *frame;
    void __user *restorer;
    int err = 0;
    + struct _fpstate_ia32 __user *fpstate = NULL;

    /* copy_to_user optimizes that into a single 8 byte store */
    static const struct {
    @@ -448,7 +456,7 @@
    0,
    };

    - frame = get_sigframe(ka, regs, sizeof(*frame));
    + frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
    goto give_sigsegv;
    @@ -457,8 +465,7 @@
    if (err)
    goto give_sigsegv;

    - err |= ia32_setup_sigcontext(&frame->sc, &frame->fpstate, regs,
    - set->sig[0]);
    + err |= ia32_setup_sigcontext(&frame->sc, fpstate, regs, set->sig[0]);
    if (err)
    goto give_sigsegv;

    @@ -522,6 +529,7 @@
    struct rt_sigframe __user *frame;
    void __user *restorer;
    int err = 0;
    + struct _fpstate_ia32 __user *fpstate = NULL;

    /* __copy_to_user optimizes that into a single 8 byte store */
    static const struct {
    @@ -537,7 +545,7 @@
    0,
    };

    - frame = get_sigframe(ka, regs, sizeof(*frame));
    + frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
    goto give_sigsegv;
    @@ -556,7 +564,7 @@
    err |= __put_user(sas_ss_flags(regs->sp),
    &frame->uc.uc_stack.ss_flags);
    err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
    - err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, &frame->fpstate,
    + err |= ia32_setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
    regs, set->sig[0]);
    err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
    if (err)
    Index: tip-0728/arch/x86/kernel/sigframe.h
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/sigframe.h 2008-07-28 18:20:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/sigframe.h 2008-07-28 18:31:15.000000000 -0700
    @@ -3,9 +3,18 @@
    char __user *pretcode;
    int sig;
    struct sigcontext sc;
    - struct _fpstate fpstate;
    + /*
    + * fpstate is unused. fpstate is moved/allocated after
    + * retcode[] below. This movement allows to have the FP state and the
    + * future state extensions (xsave) stay together.
    + * And at the same time retaining the unused fpstate, prevents changing
    + * the offset of extramask[] in the sigframe and thus prevent any
    + * legacy application accessing/modifying it.
    + */
    + struct _fpstate fpstate_unused;
    unsigned long extramask[_NSIG_WORDS-1];
    char retcode[8];
    + /* fp state follows here */
    };

    struct rt_sigframe {
    @@ -15,13 +24,14 @@
    void __user *puc;
    struct siginfo info;
    struct ucontext uc;
    - struct _fpstate fpstate;
    char retcode[8];
    + /* fp state follows here */
    };
    #else
    struct rt_sigframe {
    char __user *pretcode;
    struct ucontext uc;
    struct siginfo info;
    + /* fp state follows here */
    };
    #endif
    Index: tip-0728/arch/x86/kernel/signal_32.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/signal_32.c 2008-07-28 18:20:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/signal_32.c 2008-07-28 18:34:54.000000000 -0700
    @@ -308,7 +308,8 @@
    * Determine which stack to use..
    */
    static inline void __user *
    -get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size)
    +get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size,
    + struct _fpstate **fpstate)
    {
    unsigned long sp;

    @@ -334,6 +335,11 @@
    sp = (unsigned long) ka->sa.sa_restorer;
    }

    + if (used_math()) {
    + sp = sp - sig_xstate_size;
    + *fpstate = (struct _fpstate *) sp;
    + }
    +
    sp -= frame_size;
    /*
    * Align the stack pointer according to the i386 ABI,
    @@ -352,8 +358,9 @@
    void __user *restorer;
    int err = 0;
    int usig;
    + struct _fpstate __user *fpstate = NULL;

    - frame = get_sigframe(ka, regs, sizeof(*frame));
    + frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
    goto give_sigsegv;
    @@ -368,7 +375,7 @@
    if (err)
    goto give_sigsegv;

    - err = setup_sigcontext(&frame->sc, &frame->fpstate, regs, set->sig[0]);
    + err = setup_sigcontext(&frame->sc, fpstate, regs, set->sig[0]);
    if (err)
    goto give_sigsegv;

    @@ -429,8 +436,9 @@
    void __user *restorer;
    int err = 0;
    int usig;
    + struct _fpstate __user *fpstate = NULL;

    - frame = get_sigframe(ka, regs, sizeof(*frame));
    + frame = get_sigframe(ka, regs, sizeof(*frame), &fpstate);

    if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame)))
    goto give_sigsegv;
    @@ -455,7 +463,7 @@
    err |= __put_user(sas_ss_flags(regs->sp),
    &frame->uc.uc_stack.ss_flags);
    err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size);
    - err |= setup_sigcontext(&frame->uc.uc_mcontext, &frame->fpstate,
    + err |= setup_sigcontext(&frame->uc.uc_mcontext, fpstate,
    regs, set->sig[0]);
    err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set));
    if (err)
    Index: tip-0728/arch/x86/kernel/i387.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/i387.c 2008-07-28 18:27:28.000000000 -0700
    +++ tip-0728/arch/x86/kernel/i387.c 2008-07-28 18:31:15.000000000 -0700
    @@ -24,6 +24,7 @@
    # define save_i387_ia32 save_i387
    # define restore_i387_ia32 restore_i387
    # define _fpstate_ia32 _fpstate
    +# define sig_xstate_ia32_size sig_xstate_size
    # define user_i387_ia32_struct user_i387_struct
    # define user32_fxsr_struct user_fxsr_struct
    #endif
    @@ -36,6 +37,7 @@

    static unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
    unsigned int xstate_size;
    +unsigned int sig_xstate_ia32_size = sizeof(struct _fpstate_ia32);
    static struct i387_fxsave_struct fx_scratch __cpuinitdata;

    void __cpuinit mxcsr_feature_mask_init(void)
    Index: tip-0728/arch/x86/kernel/signal_64.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/signal_64.c 2008-07-28 18:20:15.000000000 -0700
    +++ tip-0728/arch/x86/kernel/signal_64.c 2008-07-28 18:31:15.000000000 -0700
    @@ -284,7 +284,7 @@
    struct task_struct *me = current;

    if (used_math()) {
    - fp = get_stack(ka, regs, sizeof(struct _fpstate));
    + fp = get_stack(ka, regs, sig_xstate_size);
    frame = (void __user *)round_down(
    (unsigned long)fp - sizeof(struct rt_sigframe), 16) - 8;

    Index: tip-0728/arch/x86/kernel/xsave.c
    ================================================== =================
    --- tip-0728.orig/arch/x86/kernel/xsave.c 2008-07-28 18:27:03.000000000 -0700
    +++ tip-0728/arch/x86/kernel/xsave.c 2008-07-28 18:31:15.000000000 -0700
    @@ -17,6 +17,10 @@
    */
    struct xsave_struct *init_xstate_buf;

    +#ifdef CONFIG_X86_64
    +unsigned int sig_xstate_size = sizeof(struct _fpstate);
    +#endif
    +
    /*
    * Enable the extended processor state save/restore feature
    */
    Index: tip-0728/include/asm-x86/i387.h
    ================================================== =================
    --- tip-0728.orig/include/asm-x86/i387.h 2008-07-28 18:27:28.000000000 -0700
    +++ tip-0728/include/asm-x86/i387.h 2008-07-28 18:31:15.000000000 -0700
    @@ -20,6 +20,7 @@
    #include
    #include

    +extern unsigned int sig_xstate_size;
    extern void fpu_init(void);
    extern void mxcsr_feature_mask_init(void);
    extern int init_fpu(struct task_struct *child);
    @@ -32,6 +33,7 @@
    extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;

    #ifdef CONFIG_IA32_EMULATION
    +extern unsigned int sig_xstate_ia32_size;
    struct _fpstate_ia32;
    extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
    extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);

    --

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  7. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    Suresh Siddha wrote:
    > This patchset adds the support for xsave/xrstor infrastructure for x86.
    > xsave/xrstor manages the existing and future processor extended states in x86
    > architecutre.
    >
    > More info on xsave/xrstor can be found in the Intel SDM's located at
    > http://www.intel.com/products/proces...uals/index.htm
    >
    > The layout of the xsave/xrstor area extends from the 512-byte FXSAVE/FXRSTOR
    > layout. xsave/xrstor area layout consists of:
    >
    > - fxsave/fxrstor area (512 bytes)
    > - xsave header area (64 bytes)
    > - set of save areas, each corresponding to a processor extended state
    >
    > The number of save areas, the offset and the size of each save area is
    > enumerated by CPUID leaf function 0xd.
    >
    > This patch includes the basic xsave/xrstor infrastructure(supporting FP/SSE),
    > which includes:
    > - context switch support, extending traditional lazy restore mechanism
    > - signal handling support, extending(using the software reserved bytes
    > 464..511 in the current 512byte layout of fxsave frame) the memory
    > layout pointed out by the fpstate pointer in the sigcontext
    >
    > More details in the patches to follow.
    >
    > Signed-off-by: Suresh Siddha


    Applied as tip:x86/xsave.

    I should warn I had to do quite a bit of manual fixup in order to
    disentangle it from other changes in -tip, so please test it out; I
    compile-tested it but for obvious reasons can't do more than that at the
    moment.

    -hpa
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  8. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Tue, Jul 29, 2008 at 04:09:12PM -0700, H. Peter Anvin wrote:
    > Applied as tip:x86/xsave.
    >
    > I should warn I had to do quite a bit of manual fixup in order to
    > disentangle it from other changes in -tip, so please test it out; I
    > compile-tested it but for obvious reasons can't do more than that at the
    > moment.


    hpa, these patches just apply fine to tip/master. Can you please arrange
    the tip/x86/xsave tree accordingly? or do I need to do something else
    to smooth this process?

    thanks,
    suresh
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  9. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    Suresh Siddha wrote:
    > On Tue, Jul 29, 2008 at 04:09:12PM -0700, H. Peter Anvin wrote:
    >> Applied as tip:x86/xsave.
    >>
    >> I should warn I had to do quite a bit of manual fixup in order to
    >> disentangle it from other changes in -tip, so please test it out; I
    >> compile-tested it but for obvious reasons can't do more than that at the
    >> moment.

    >
    > hpa, these patches just apply fine to tip/master. Can you please arrange
    > the tip/x86/xsave tree accordingly? or do I need to do something else
    > to smooth this process?


    This is awkward, since that means this is "derived topic". Most of the
    changes are orthogonal and relatively trivial to fix up at merge time,
    so I would prefer to keep them separate.

    -hpa
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  10. Re: [patch 0/9] x86, xsave: xsave/xrstor support


    * H. Peter Anvin wrote:

    >> hpa, these patches just apply fine to tip/master. Can you please
    >> arrange the tip/x86/xsave tree accordingly? or do I need to do
    >> something else to smooth this process?

    >
    > This is awkward, since that means this is "derived topic". Most of
    > the changes are orthogonal and relatively trivial to fix up at merge
    > time, so I would prefer to keep them separate.


    Well, in this case the conflicts seem to be quite heavy, so i'd suggest
    to use the method we have used for x86/x2apic and for xen-64bit:

    Merge the affected topics into tip/x86/core. Then merge x86/core into
    x86/xsave, and put the xsave patches ontop of that base.

    This way x86/xsave is a 'derived' topic and optional until it's proven,
    but one that is still mergable once all the dependent topics go
    upstream. We'd only have to rebase it in the (unlikely) event of there
    being some major problem with any of the topics merged into x86/core.

    ok?

    Ingo
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  11. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    Ingo Molnar wrote:
    > * H. Peter Anvin wrote:
    >
    >>> hpa, these patches just apply fine to tip/master. Can you please
    >>> arrange the tip/x86/xsave tree accordingly? or do I need to do
    >>> something else to smooth this process?

    >> This is awkward, since that means this is "derived topic". Most of
    >> the changes are orthogonal and relatively trivial to fix up at merge
    >> time, so I would prefer to keep them separate.

    >
    > Well, in this case the conflicts seem to be quite heavy, so i'd suggest
    > to use the method we have used for x86/x2apic and for xen-64bit:
    >
    > Merge the affected topics into tip/x86/core. Then merge x86/core into
    > x86/xsave, and put the xsave patches ontop of that base.
    >
    > This way x86/xsave is a 'derived' topic and optional until it's proven,
    > but one that is still mergable once all the dependent topics go
    > upstream. We'd only have to rebase it in the (unlikely) event of there
    > being some major problem with any of the topics merged into x86/core.
    >
    > ok?


    It somewhat concerns me, because one of the conflicts is generated by
    collision with x2apic. The rest of them I don't think are too problematic.

    Most of the conflicts are of the type "orthogonal transformations to the
    same chunk of code", which doesn't make them less annoying.

    -hpa
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  12. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Wed, Jul 30, 2008 at 09:31:41AM -0700, H. Peter Anvin wrote:
    > Ingo Molnar wrote:
    > > * H. Peter Anvin wrote:
    > >
    > >>> hpa, these patches just apply fine to tip/master. Can you please
    > >>> arrange the tip/x86/xsave tree accordingly? or do I need to do
    > >>> something else to smooth this process?
    > >> This is awkward, since that means this is "derived topic". Most of
    > >> the changes are orthogonal and relatively trivial to fix up at merge
    > >> time, so I would prefer to keep them separate.

    > >
    > > Well, in this case the conflicts seem to be quite heavy, so i'd suggest
    > > to use the method we have used for x86/x2apic and for xen-64bit:
    > >
    > > Merge the affected topics into tip/x86/core. Then merge x86/core into
    > > x86/xsave, and put the xsave patches ontop of that base.
    > >
    > > This way x86/xsave is a 'derived' topic and optional until it's proven,
    > > but one that is still mergable once all the dependent topics go
    > > upstream. We'd only have to rebase it in the (unlikely) event of there
    > > being some major problem with any of the topics merged into x86/core.
    > >
    > > ok?

    >
    > It somewhat concerns me, because one of the conflicts is generated by
    > collision with x2apic. The rest of them I don't think are too problematic.


    hpa, confilicts with x2apic branch are very small and related to cpuid bits.

    commit 04df16d2465cbb59b84c9c57ad865dbbeebadad8
    Author: Suresh Siddha
    Date: Tue Jul 29 10:29:18 2008 -0700

    x86, xsave: xsave cpuid feature bits

    Add xsave CPU feature bits.

    and

    commit 32e1d0a0651004f5fe47f85a2a5c725ad579a90c
    Author: Suresh Siddha
    Date: Thu Jul 10 11:16:50 2008 -0700

    x64, x2apic/intr-remap: cpuid bits for x2apic feature

    cpuid feature for x2apic.

    Both of these patches are straight forward, simple and can be moved
    to x86/core(?) now, if that helps.

    thanks,
    suresh
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  13. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    Suresh Siddha wrote:

    >> It somewhat concerns me, because one of the conflicts is generated by
    >> collision with x2apic. The rest of them I don't think are too problematic.

    >
    > hpa, confilicts with x2apic branch are very small and related to cpuid bits.
    >
    > commit 04df16d2465cbb59b84c9c57ad865dbbeebadad8
    > Author: Suresh Siddha
    > Date: Tue Jul 29 10:29:18 2008 -0700
    >
    > x86, xsave: xsave cpuid feature bits
    >
    > Add xsave CPU feature bits.
    >
    > and
    >
    > commit 32e1d0a0651004f5fe47f85a2a5c725ad579a90c
    > Author: Suresh Siddha
    > Date: Thu Jul 10 11:16:50 2008 -0700
    >
    > x64, x2apic/intr-remap: cpuid bits for x2apic feature
    >
    > cpuid feature for x2apic.
    >
    > Both of these patches are straight forward, simple and can be moved
    > to x86/core(?) now, if that helps.


    This is true. Cherry-picking those to the x86/core branch is probably
    the easiest, even if that means they're duplicated in the x2apic branch
    (I presume we don't want to rebase x2apic).

    -hpa
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  14. Re: [patch 0/9] x86, xsave: xsave/xrstor support


    * Ingo Molnar wrote:

    > Well, in this case the conflicts seem to be quite heavy, so i'd
    > suggest to use the method we have used for x86/x2apic and for
    > xen-64bit:
    >
    > Merge the affected topics into tip/x86/core. Then merge x86/core into
    > x86/xsave, and put the xsave patches ontop of that base.
    >
    > This way x86/xsave is a 'derived' topic and optional until it's
    > proven, but one that is still mergable once all the dependent topics
    > go upstream. We'd only have to rebase it in the (unlikely) event of
    > there being some major problem with any of the topics merged into
    > x86/core.


    I've restructured tip/x86/xsave to be like this, and it can now be
    merged into tip/master without conficts.

    I briefly merged it into tip/master to test it, but after about 10
    randconfig iterations it ran into a spontaneous reboot crash. There's
    nothing in the log, the box (an Athlon64 X2) just reboots spontaneously.
    Removing the x86/xsave changes makes the system boot up fine.

    I've pushed out the tree i tested into the tip/tmp.x86/xsave.broken
    branch. The bad config is:

    http://redhat.com/~mingo/misc/config..._CEST_2008.bad

    Two crashlogs are here:

    http://redhat.com/~mingo/misc/crash-..._CEST_2008.log

    the serial log just stops at a certain point. It's not at a specific
    point, but the crash happened both times i tried to boot it.

    Ingo
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  15. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Wed, Jul 30, 2008 at 11:25:39AM -0700, Ingo Molnar wrote:
    >
    > I've restructured tip/x86/xsave to be like this, and it can now be
    > merged into tip/master without conficts.


    thanks.

    > I briefly merged it into tip/master to test it, but after about 10
    > randconfig iterations it ran into a spontaneous reboot crash. There's
    > nothing in the log, the box (an Athlon64 X2) just reboots spontaneously.
    > Removing the x86/xsave changes makes the system boot up fine.


    I am also seeing this reboot issue and am hitting this both on tip/master
    aswell as the tip/tmp.x86/xsave.broken

    It seems to be timing related. Will look further.

    thanks,
    suresh
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  16. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Wed, Jul 30, 2008 at 11:25:39AM -0700, Ingo Molnar wrote:
    > I briefly merged it into tip/master to test it, but after about 10
    > randconfig iterations it ran into a spontaneous reboot crash. There's
    > nothing in the log, the box (an Athlon64 X2) just reboots spontaneously.
    > Removing the x86/xsave changes makes the system boot up fine.
    >
    > I've pushed out the tree i tested into the tip/tmp.x86/xsave.broken
    > branch. The bad config is:
    >
    > http://redhat.com/~mingo/misc/config..._CEST_2008.bad


    Ingo, 2.6.25, 2.6.26 also reboots randomly with this config on my dual-socket
    system.
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  17. Re: [patch 0/9] x86, xsave: xsave/xrstor support


    * Suresh Siddha wrote:

    > On Wed, Jul 30, 2008 at 11:25:39AM -0700, Ingo Molnar wrote:
    > > I briefly merged it into tip/master to test it, but after about 10
    > > randconfig iterations it ran into a spontaneous reboot crash. There's
    > > nothing in the log, the box (an Athlon64 X2) just reboots spontaneously.
    > > Removing the x86/xsave changes makes the system boot up fine.
    > >
    > > I've pushed out the tree i tested into the tip/tmp.x86/xsave.broken
    > > branch. The bad config is:
    > >
    > > http://redhat.com/~mingo/misc/config..._CEST_2008.bad

    >
    > Ingo, 2.6.25, 2.6.26 also reboots randomly with this config on my
    > dual-socket system.


    hmmm ....

    a few guesses: perhaps I2C related (the randconfig turned on I2C bits)?
    Do you have any way (hw test-kit) to figure out where the reboot comes
    from - is it a triple fault caused by the kernel? Or some hardware
    event?

    Ingo
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  18. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Thu, Jul 31, 2008 at 02:29:15PM -0700, Ingo Molnar wrote:
    > > Ingo, 2.6.25, 2.6.26 also reboots randomly with this config on my
    > > dual-socket system.

    >
    > hmmm ....
    >
    > a few guesses: perhaps I2C related (the randconfig turned on I2C bits)?
    > Do you have any way (hw test-kit) to figure out where the reboot comes
    > from - is it a triple fault caused by the kernel? Or some hardware
    > event?


    Doh! I knew something was wrong with your randconfig

    #
    # Watchdog Device Drivers
    #
    .....

    CONFIG_PC87413_WDT=y
    CONFIG_60XX_WDT=y
    # CONFIG_SBC8360_WDT is not set
    CONFIG_CPU5_WDT=y
    CONFIG_SMSC37B787_WDT=y
    CONFIG_W83627HF_WDT=y
    CONFIG_W83697HF_WDT=y
    CONFIG_W83877F_WDT=y
    CONFIG_W83977F_WDT=y
    CONFIG_MACHZ_WDT=y
    CONFIG_SBC_EPX_C3_WATCHDOG=y

    Kernel was enabling watchdog, with out the userspace having the
    heartbeat daemon....

    randconfig is really not a good way to test! I can't even ssh to the box
    with this config (something else is missing in the config!)

    Anyhow, with watchdog removed, it works just fine. (both xsave and non-xsave
    kernels)

    thanks,
    suresh
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  19. Re: [patch 0/9] x86, xsave: xsave/xrstor support

    On Thu, Jul 31, 2008 at 03:14:35PM -0700, Andi Kleen wrote:
    > > Kernel was enabling watchdog, with out the userspace having the
    > > heartbeat daemon....

    >
    > Watchdog are normally only armed when someone opens the device
    > first.


    But thats not what I see with for ex with, w83627hf_wdt.c

    Its done at the module_init time. (while I thought it should be
    really done when some user level app opens the device, probably
    its poorly written to take care if the kernel panics before starting userland.
    but kernel can even die before the watchdog driver load aswell ;-)
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  20. Re: [patch 0/9] x86, xsave: xsave/xrstor support


    * Suresh Siddha wrote:

    > On Thu, Jul 31, 2008 at 02:29:15PM -0700, Ingo Molnar wrote:
    > > > Ingo, 2.6.25, 2.6.26 also reboots randomly with this config on my
    > > > dual-socket system.

    > >
    > > hmmm ....
    > >
    > > a few guesses: perhaps I2C related (the randconfig turned on I2C bits)?
    > > Do you have any way (hw test-kit) to figure out where the reboot comes
    > > from - is it a triple fault caused by the kernel? Or some hardware
    > > event?

    >
    > Doh! I knew something was wrong with your randconfig
    >
    > #
    > # Watchdog Device Drivers
    > #
    > ....
    >
    > CONFIG_PC87413_WDT=y
    > CONFIG_60XX_WDT=y
    > # CONFIG_SBC8360_WDT is not set
    > CONFIG_CPU5_WDT=y
    > CONFIG_SMSC37B787_WDT=y
    > CONFIG_W83627HF_WDT=y
    > CONFIG_W83697HF_WDT=y
    > CONFIG_W83877F_WDT=y
    > CONFIG_W83977F_WDT=y
    > CONFIG_MACHZ_WDT=y
    > CONFIG_SBC_EPX_C3_WATCHDOG=y
    >
    > Kernel was enabling watchdog, with out the userspace having the
    > heartbeat daemon....


    I never had function hw watchdog support on this box - so i guess the
    2.6.27-rc1 kernel started supporting it - cool.

    This was unfortunate timing i guess - when i removed xsave i didnt get
    the reboot :-/

    > randconfig is really not a good way to test! I can't even ssh to the
    > box with this config (something else is missing in the config!)


    it is a randconfig tailored to my testboxes, it might not work out of
    box on yours :-)

    randconfig is an excellent way of testing kernels, that testbox can run
    strings of hundreds (sometimes thousands) of random kernels without
    hitting any kernel bug. I had to resolve a large number of real kernel
    bugs (and a handful of glitches like this hardware watchdog thing) to
    get so far though.

    > Anyhow, with watchdog removed, it works just fine. (both xsave and
    > non-xsave kernels)


    Great, thanks. I've re-integrated tip/x86/xsave into x86/master and have
    pushed out the result.

    Ingo
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