[PATCH 1/5] FRV: Handle update_mmu_cache() being called when current->mm is NULL - Kernel

This is a discussion on [PATCH 1/5] FRV: Handle update_mmu_cache() being called when current->mm is NULL - Kernel ; From: David Howells Handle update_mmu_cache() being called when current->mm is NULL. We cache static TLB mappings for the current page table in DAMPR4 and DAMPR5 on the theory that the next data lookup is likely to be in the same ...

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Thread: [PATCH 1/5] FRV: Handle update_mmu_cache() being called when current->mm is NULL

  1. [PATCH 1/5] FRV: Handle update_mmu_cache() being called when current->mm is NULL

    From: David Howells

    Handle update_mmu_cache() being called when current->mm is NULL.

    We cache static TLB mappings for the current page table in DAMPR4 and DAMPR5
    on the theory that the next data lookup is likely to be in the same general
    region, and thus is likely to be mapped by the same page table. However, we
    can't get this information if we can't access the appropriate mm_struct.

    If current->mm is NULL, we just clear the cache in the knowledge that the TLB
    miss handlers will load it.

    Signed-off-by: David Howells
    ---

    Makefile | 11 ++++++-----
    include/asm-frv/pgtable.h | 19 ++++++++++++++-----
    2 files changed, 20 insertions(+), 10 deletions(-)


    diff --git a/Makefile b/Makefile
    index fec2a12..54d4fb2 100644
    --- a/Makefile
    +++ b/Makefile
    @@ -501,11 +501,12 @@ endif # $(dot-config)
    # Defaults vmlinux but it is usually overridden in the arch makefile
    all: vmlinux

    -ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
    -KBUILD_CFLAGS += -Os
    -else
    -KBUILD_CFLAGS += -O2
    -endif
    +#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
    +#KBUILD_CFLAGS += -Os
    +#else
    +#KBUILD_CFLAGS += -O2
    +#endif
    +KBUILD_CFLAGS += -O1

    # Force gcc to behave correct even for buggy distributions
    # Arch Makefiles may override this setting
    diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h
    index 6c0682e..4e21904 100644
    --- a/include/asm-frv/pgtable.h
    +++ b/include/asm-frv/pgtable.h
    @@ -507,13 +507,22 @@ static inline int pte_file(pte_t pte)
    */
    static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
    {
    + struct mm_struct *mm;
    unsigned long ampr;
    - pgd_t *pge = pgd_offset(current->mm, address);
    - pud_t *pue = pud_offset(pge, address);
    - pmd_t *pme = pmd_offset(pue, address);

    - ampr = pme->ste[0] & 0xffffff00;
    - ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V;
    + mm = current->mm;
    + if (mm) {
    + pgd_t *pge = pgd_offset(mm, address);
    + pud_t *pue = pud_offset(pge, address);
    + pmd_t *pme = pmd_offset(pue, address);
    +
    + ampr = pme->ste[0] & 0xffffff00;
    + ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
    + xAMPRx_V;
    + } else {
    + address = ULONG_MAX;
    + ampr = 0;
    + }

    asm volatile("movgs %0,scr0\n"
    "movgs %0,scr1\n"

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  2. [PATCH 3/5] FRV: Add support for emulation of userspace atomic ops

    From: David Howells

    Use traps 120-126 to emulate atomic cmpxchg32, xchg32, and XOR-, OR-, AND-, SUB-
    and ADD-to-memory operations for userspace.

    Signed-off-by: David Howells
    ---

    arch/frv/kernel/entry-table.S | 8 +
    arch/frv/kernel/entry.S | 20 ++++
    arch/frv/kernel/traps.c | 227 +++++++++++++++++++++++++++++++++++++++++
    include/asm-frv/spr-regs.h | 14 +++
    4 files changed, 268 insertions(+), 1 deletions(-)


    diff --git a/arch/frv/kernel/entry-table.S b/arch/frv/kernel/entry-table.S
    index d3b9253..bf35f33 100644
    --- a/arch/frv/kernel/entry-table.S
    +++ b/arch/frv/kernel/entry-table.S
    @@ -316,8 +316,14 @@ __trap_fixup_kernel_data_tlb_miss:
    .section .trap.vector
    .org TBR_TT_TRAP0 >> 2
    .long system_call
    - .rept 126
    + .rept 119
    .long __entry_unsupported_trap
    .endr
    +
    + # userspace atomic op emulation, traps 120-126
    + .rept 7
    + .long __entry_atomic_op
    + .endr
    +
    .org TBR_TT_BREAK >> 2
    .long __entry_debug_exception
    diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
    index f36d7f4..b8a4b94 100644
    --- a/arch/frv/kernel/entry.S
    +++ b/arch/frv/kernel/entry.S
    @@ -656,6 +656,26 @@ __entry_debug_exception:

    ################################################## #############################
    #
    +# handle atomic operation emulation for userspace
    +#
    +################################################# ##############################
    + .globl __entry_atomic_op
    +__entry_atomic_op:
    + LEDS 0x6012
    + sethi.p %hi(atomic_operation),gr5
    + setlo %lo(atomic_operation),gr5
    + movsg esfr1,gr8
    + movsg epcr0,gr9
    + movsg esr0,gr10
    +
    + # now that we've accessed the exception regs, we can enable exceptions
    + movsg psr,gr4
    + ori gr4,#PSR_ET,gr4
    + movgs gr4,psr
    + jmpl @(gr5,gr0) ; call atomic_operation(esfr1,epcr0,esr0)
    +
    +################################################# ##############################
    +#
    # handle media exception
    #
    ################################################## #############################
    diff --git a/arch/frv/kernel/traps.c b/arch/frv/kernel/traps.c
    index 2e6098c..2f7e668 100644
    --- a/arch/frv/kernel/traps.c
    +++ b/arch/frv/kernel/traps.c
    @@ -102,6 +102,233 @@ asmlinkage void illegal_instruction(unsigned long esfr1, unsigned long epcr0, un

    /************************************************** ***************************/
    /*
    + * handle atomic operations with errors
    + * - arguments in gr8, gr9, gr10
    + * - original memory value placed in gr5
    + * - replacement memory value placed in gr9
    + */
    +asmlinkage void atomic_operation(unsigned long esfr1, unsigned long epcr0,
    + unsigned long esr0)
    +{
    + static DEFINE_SPINLOCK(atomic_op_lock);
    + unsigned long x, y, z, *p;
    + mm_segment_t oldfs;
    + siginfo_t info;
    + int ret;
    +
    + y = 0;
    + z = 0;
    +
    + oldfs = get_fs();
    + if (!user_mode(__frame))
    + set_fs(KERNEL_DS);
    +
    + switch (__frame->tbr & TBR_TT) {
    + /* TIRA gr0,#120
    + * u32 __atomic_user_cmpxchg32(u32 *ptr, u32 test, u32 new)
    + */
    + case TBR_TT_ATOMIC_CMPXCHG32:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    + y = __frame->gr10;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + if (z != x)
    + goto done;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + if (z != x)
    + goto done2;
    +
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#121
    + * u32 __atomic_kernel_xchg32(void *v, u32 new)
    + */
    + case TBR_TT_ATOMIC_XCHG32:
    + p = (unsigned long *) __frame->gr8;
    + y = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#122
    + * ulong __atomic_kernel_XOR_return(ulong i, ulong *v)
    + */
    + case TBR_TT_ATOMIC_XOR:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + y = x ^ z;
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#123
    + * ulong __atomic_kernel_OR_return(ulong i, ulong *v)
    + */
    + case TBR_TT_ATOMIC_OR:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + y = x ^ z;
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#124
    + * ulong __atomic_kernel_AND_return(ulong i, ulong *v)
    + */
    + case TBR_TT_ATOMIC_AND:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + y = x & z;
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#125
    + * int __atomic_user_sub_return(atomic_t *v, int i)
    + */
    + case TBR_TT_ATOMIC_SUB:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + y = z - x;
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + /* TIRA gr0,#126
    + * int __atomic_user_add_return(atomic_t *v, int i)
    + */
    + case TBR_TT_ATOMIC_ADD:
    + p = (unsigned long *) __frame->gr8;
    + x = __frame->gr9;
    +
    + for (; {
    + ret = get_user(z, p);
    + if (ret < 0)
    + goto error;
    +
    + spin_lock_irq(&atomic_op_lock);
    +
    + if (__get_user(z, p) == 0) {
    + y = z + x;
    + if (__put_user(y, p) == 0)
    + goto done2;
    + goto error2;
    + }
    +
    + spin_unlock_irq(&atomic_op_lock);
    + }
    +
    + default:
    + BUG();
    + }
    +
    +done2:
    + spin_unlock_irq(&atomic_op_lock);
    +done:
    + if (!user_mode(__frame))
    + set_fs(oldfs);
    + __frame->gr5 = z;
    + __frame->gr9 = y;
    + return;
    +
    +error2:
    + spin_unlock_irq(&atomic_op_lock);
    +error:
    + if (!user_mode(__frame))
    + set_fs(oldfs);
    + __frame->pc -= 4;
    +
    + die_if_kernel("-- Atomic Op Error --\n");
    +
    + info.si_signo = SIGSEGV;
    + info.si_code = SEGV_ACCERR;
    + info.si_errno = 0;
    + info.si_addr = (void *) __frame->pc;
    +
    + force_sig_info(info.si_signo, &info, current);
    +}
    +
    +/************************************************** ***************************/
    +/*
    *
    */
    asmlinkage void media_exception(unsigned long msr0, unsigned long msr1)
    diff --git a/include/asm-frv/spr-regs.h b/include/asm-frv/spr-regs.h
    index c2a541e..01e6af5 100644
    --- a/include/asm-frv/spr-regs.h
    +++ b/include/asm-frv/spr-regs.h
    @@ -99,9 +99,23 @@
    #define TBR_TT_TRAP1 (0x81 << 4)
    #define TBR_TT_TRAP2 (0x82 << 4)
    #define TBR_TT_TRAP3 (0x83 << 4)
    +#define TBR_TT_TRAP120 (0xf8 << 4)
    +#define TBR_TT_TRAP121 (0xf9 << 4)
    +#define TBR_TT_TRAP122 (0xfa << 4)
    +#define TBR_TT_TRAP123 (0xfb << 4)
    +#define TBR_TT_TRAP124 (0xfc << 4)
    +#define TBR_TT_TRAP125 (0xfd << 4)
    #define TBR_TT_TRAP126 (0xfe << 4)
    #define TBR_TT_BREAK (0xff << 4)

    +#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
    +#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
    +#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
    +#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
    +#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
    +#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
    +#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
    +
    #define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })

    /*

    --
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  3. [PATCH 2/5] FRV: Move STACK_TOP_MAX up

    From: David Howells

    Move STACK_TOP_MAX up so that we don't try moving the stack above it as that
    causes setup_arg_pages() to malfunction.

    Signed-off-by: David Howells
    ---

    include/asm-frv/mem-layout.h | 2 +-
    1 files changed, 1 insertions(+), 1 deletions(-)


    diff --git a/include/asm-frv/mem-layout.h b/include/asm-frv/mem-layout.h
    index 8353225..734a1d0 100644
    --- a/include/asm-frv/mem-layout.h
    +++ b/include/asm-frv/mem-layout.h
    @@ -60,7 +60,7 @@
    */
    #define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
    #define STACK_TOP __UL(2 * 1024 * 1024)
    -#define STACK_TOP_MAX STACK_TOP
    +#define STACK_TOP_MAX __UL(0xc0000000)

    /* userspace process size */
    #ifdef CONFIG_MMU

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  4. Re: [PATCH 1/5] FRV: Handle update_mmu_cache() being called when current->mm is NULL

    David Howells wrote:

    > --- a/Makefile
    > +++ b/Makefile
    > @@ -501,11 +501,12 @@ endif # $(dot-config)
    > # Defaults vmlinux but it is usually overridden in the arch makefile
    > all: vmlinux
    >
    > -ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
    > -KBUILD_CFLAGS += -Os
    > -else
    > -KBUILD_CFLAGS += -O2
    > -endif
    > +#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
    > +#KBUILD_CFLAGS += -Os
    > +#else
    > +#KBUILD_CFLAGS += -O2
    > +#endif
    > +KBUILD_CFLAGS += -O1


    Oops. Don't use this patch. I forgot to delete this bit.

    David
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  5. [PATCH 5/5] FRV: Don't make smp_{r, w, }mb() interpolate MEMBAR when CONFIG_SMP=n

    From: David Howells

    Don't make smp_{r,w,}mb() interpolate a MEMBAR instruction when CONFIG_SMP=n as
    SMP memory barries on UP systems should interpolate a compiler barrier only.

    Signed-off-by: David Howells
    ---

    include/asm-frv/system.h | 21 +++++++++++++++------
    1 files changed, 15 insertions(+), 6 deletions(-)


    diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
    index 2c57f47..30a67a9 100644
    --- a/include/asm-frv/system.h
    +++ b/include/asm-frv/system.h
    @@ -179,14 +179,23 @@ do { \
    #define mb() asm volatile ("membar" : : :"memory")
    #define rmb() asm volatile ("membar" : : :"memory")
    #define wmb() asm volatile ("membar" : : :"memory")
    -#define set_mb(var, value) do { var = value; mb(); } while (0)
    +#define read_barrier_depends() barrier()

    -#define smp_mb() mb()
    -#define smp_rmb() rmb()
    -#define smp_wmb() wmb()
    -
    -#define read_barrier_depends() do {} while(0)
    +#ifdef CONFIG_SMP
    +#define smp_mb() mb()
    +#define smp_rmb() rmb()
    +#define smp_wmb() wmb()
    #define smp_read_barrier_depends() read_barrier_depends()
    +#define set_mb(var, value) \
    + do { xchg(&var, (value)); } while (0)
    +#else
    +#define smp_mb() barrier()
    +#define smp_rmb() barrier()
    +#define smp_wmb() barrier()
    +#define smp_read_barrier_depends() do {} while(0)
    +#define set_mb(var, value) \
    + do { var = (value); barrier(); } while (0)
    +#endif

    #define HARD_RESET_NOW() \
    do { \

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  6. [PATCH 4/5] FRV: Make NOMMU-mode work with base addresses other than 0xC0000000

    From: David Howells

    Make NOMMU-mode work with base addresses other than 0xC0000000 by:

    (1) Giving the code that sets up the protection registers the right address
    in __sdram_base. Rather than being hard coded to 0xC0000000, the value
    of __page_offset is obtained from the linker script.

    (2) Eliminate the check in __switch_to() that verifies the current thread
    info is in the 0xCxxxxxxx region.

    Signed-off-by: David Howells
    ---

    arch/frv/kernel/head.inc | 2 +-
    arch/frv/kernel/switch_to.S | 7 -------
    2 files changed, 1 insertions(+), 8 deletions(-)


    diff --git a/arch/frv/kernel/head.inc b/arch/frv/kernel/head.inc
    index d424cd2..bff6662 100644
    --- a/arch/frv/kernel/head.inc
    +++ b/arch/frv/kernel/head.inc
    @@ -46,5 +46,5 @@
    #ifdef CONFIG_MMU
    __sdram_base = 0x00000000 /* base address to which SDRAM relocated */
    #else
    -__sdram_base = 0xc0000000 /* base address to which SDRAM relocated */
    +__sdram_base = __page_offset /* base address to which SDRAM relocated */
    #endif
    diff --git a/arch/frv/kernel/switch_to.S b/arch/frv/kernel/switch_to.S
    index b5275fa..b066686 100644
    --- a/arch/frv/kernel/switch_to.S
    +++ b/arch/frv/kernel/switch_to.S
    @@ -102,13 +102,6 @@ __switch_to:
    movgs gr14,lr
    bar

    - srli gr15,#28,gr5
    - subicc gr5,#0xc,gr0,icc0
    - beq icc0,#0,111f
    - break
    - nop
    -111:
    -
    # jump to __switch_back or ret_from_fork as appropriate
    # - move prev to GR8
    movgs gr4,psr

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