[PATCH] PCI: fix for quirk_e100_interrupt() - Kernel

This is a discussion on [PATCH] PCI: fix for quirk_e100_interrupt() - Kernel ; Check that the e100 is in the D0 power state. If it's not, it won't respond to MMIO accesses and we end up with master-abort machine checks on some platforms. Signed-off-by: Ivan Kokshaysky --- drivers/pci/quirks.c | 14 +++++++++++++- 1 files ...

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Thread: [PATCH] PCI: fix for quirk_e100_interrupt()

  1. [PATCH] PCI: fix for quirk_e100_interrupt()

    Check that the e100 is in the D0 power state. If it's not, it won't
    respond to MMIO accesses and we end up with master-abort machine
    checks on some platforms.

    Signed-off-by: Ivan Kokshaysky
    ---
    drivers/pci/quirks.c | 14 +++++++++++++-
    1 files changed, 13 insertions(+), 1 deletions(-)

    diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
    index 26cc4dc..c8b2b9d 100644
    --- a/drivers/pci/quirks.c
    +++ b/drivers/pci/quirks.c
    @@ -1406,9 +1406,10 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);

    static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
    {
    - u16 command;
    + u16 command, pmcsr;
    u8 __iomem *csr;
    u8 cmd_hi;
    + int pm;

    switch (dev->device) {
    /* PCI IDs taken from drivers/net/e100.c */
    @@ -1442,6 +1443,17 @@ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
    if (!(command & PCI_COMMAND_MEMORY) || !pci_resource_start(dev, 0))
    return;

    + /*
    + * Check that the device is in the D0 power state. If it's not,
    + * there is no point to look any further.
    + */
    + pm = pci_find_capability(dev, PCI_CAP_ID_PM);
    + if (pm) {
    + pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
    + if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0)
    + return;
    + }
    +
    /* Convert from PCI bus to resource space. */
    csr = ioremap(pci_resource_start(dev, 0), 8);
    if (!csr) {
    --
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  2. Re: [PATCH] PCI: fix for quirk_e100_interrupt()

    Ivan Kokshaysky wrote:
    > Check that the e100 is in the D0 power state. If it's not, it won't
    > respond to MMIO accesses and we end up with master-abort machine
    > checks on some platforms.
    >
    > Signed-off-by: Ivan Kokshaysky


    what kind of platform actually is doing this? It almost seems like something is
    wrong with that platform's BIOS and I wonder if this workaround should not be more
    general (IOW is it not just e100 that is affected but other components as well?)

    Auke


    > ---
    > drivers/pci/quirks.c | 14 +++++++++++++-
    > 1 files changed, 13 insertions(+), 1 deletions(-)
    >
    > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
    > index 26cc4dc..c8b2b9d 100644
    > --- a/drivers/pci/quirks.c
    > +++ b/drivers/pci/quirks.c
    > @@ -1406,9 +1406,10 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos);
    >
    > static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
    > {
    > - u16 command;
    > + u16 command, pmcsr;
    > u8 __iomem *csr;
    > u8 cmd_hi;
    > + int pm;
    >
    > switch (dev->device) {
    > /* PCI IDs taken from drivers/net/e100.c */
    > @@ -1442,6 +1443,17 @@ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
    > if (!(command & PCI_COMMAND_MEMORY) || !pci_resource_start(dev, 0))
    > return;
    >
    > + /*
    > + * Check that the device is in the D0 power state. If it's not,
    > + * there is no point to look any further.
    > + */
    > + pm = pci_find_capability(dev, PCI_CAP_ID_PM);
    > + if (pm) {
    > + pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
    > + if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0)
    > + return;
    > + }
    > +
    > /* Convert from PCI bus to resource space. */
    > csr = ioremap(pci_resource_start(dev, 0), 8);
    > if (!csr) {
    > --
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  3. Re: [PATCH] PCI: fix for quirk_e100_interrupt()

    On Mon, Dec 17, 2007 at 01:57:33PM -0800, Kok, Auke wrote:
    > what kind of platform actually is doing this? It almost seems like something is
    > wrong with that platform's BIOS and I wonder if this workaround should not be more
    > general (IOW is it not just e100 that is affected but other components as well?)


    It's alpha sx164. But I don't think the firmware does anything wrong here,
    it just put e100 in "sleep" or "soft off" state.
    I think a general rule is that you cannot access device MEM or IO registers
    without pci_enable_device first (or making sure that the device is actually
    enabled in other ways).

    Ivan.
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