This is a discussion on Re: [PATCH Kbuild] Call only one make with all targets for O= - Kernel ; On Fri, Sep 21, 2007 at 06:09:02PM -0500, Milton Miller wrote: > Change the invocations of make in the output directory Makefile and the > main Makefile for seperate object trees to pass all goals to one $(MAKE) > via ...
On Fri, Sep 21, 2007 at 06:09:02PM -0500, Milton Miller wrote:
> Change the invocations of make in the output directory Makefile and the
> main Makefile for seperate object trees to pass all goals to one $(MAKE)
> via a new phony target "sub-make" and the existing target _all.
> When compiling with seperate object directories, a seperate make is called
> in the context of another directory (from the output directory the main
> Makefile is called, the Makefile is then restarted with current directory
> set to the object tree). Before this patch, when multiple make command
> goals are specified, each target results in a seperate make invocation.
> With make -j, these invocations may run in parallel, resulting in multiple
> commands running in the same directory clobbering each others results.
> I did not try to address make -j for mixed dot-config and no-dot-config
> targets. Because the order does matter, a solution was not obvious.
> Perhaps a simple check for MAKEFLAGS having -j and refusing to run would
> be approprate.
Applied to kbuild.git.
This was a nice one to get ruined out.
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