size of atomic memory read/write - HP UX

This is a discussion on size of atomic memory read/write - HP UX ; Hello all, I don't know much about HP machine's architecture. Does anyone know if HP's SMP has weakly or strongly consistent memory? Also,if the data is aligned, at what size does it guarantee atomic read/write to the data? Thanks! -DYZ...

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Thread: size of atomic memory read/write

  1. size of atomic memory read/write

    Hello all,

    I don't know much about HP machine's architecture. Does anyone know if HP's
    SMP has weakly or strongly consistent memory? Also,if the data is aligned,
    at what size does it guarantee atomic read/write to the data?

    Thanks!

    -DYZ

  2. Re: size of atomic memory read/write

    DYZ wrote:
    > I don't know much about HP machine's architecture. Does anyone know
    > if HP's SMP has weakly or strongly consistent memory? Also,if the
    > data is aligned, at what size does it guarantee atomic read/write to
    > the data?


    I'm not sure if the answer is different, but are you talking about
    PA-RISC or Itanium? HP-UX runs on both.

    rick jones
    --
    No need to believe in either side, or any side. There is no cause.
    There's only yourself. The belief is in your own precision. - Jobert
    these opinions are mine, all mine; HP might not want them anyway...
    feel free to post, OR email to rick.jones2 in hp.com but NOT BOTH...

  3. Re: size of atomic memory read/write

    Rick Jones wrote in news:IaL6h.2513$OF4.960
    @news.cpqcorp.net:

    > DYZ wrote:
    >> I don't know much about HP machine's architecture. Does anyone know
    >> if HP's SMP has weakly or strongly consistent memory? Also,if the
    >> data is aligned, at what size does it guarantee atomic read/write to
    >> the data?

    >
    > I'm not sure if the answer is different, but are you talking about
    > PA-RISC or Itanium? HP-UX runs on both.
    >
    > rick jones


    Let's first assume this is on PA-RISC, but I'm more than happy to know the
    answer for both. Thanks again!

    DYZ

  4. Re: size of atomic memory read/write

    DYZ wrote:
    > Rick Jones wrote in news:IaL6h.2513$OF4.960
    > @news.cpqcorp.net:


    >> DYZ wrote:
    >>> I don't know much about HP machine's architecture. Does anyone know
    >>> if HP's SMP has weakly or strongly consistent memory? Also,if the
    >>> data is aligned, at what size does it guarantee atomic read/write to
    >>> the data?

    >>
    >> I'm not sure if the answer is different, but are you talking about
    >> PA-RISC or Itanium? HP-UX runs on both.
    >>
    >> rick jones


    > Let's first assume this is on PA-RISC, but I'm more than happy to
    > know the answer for both. Thanks again!


    Well at the considerable risk of being wrong I believe that
    four-byte reads/writes on a four-byte bondary are "atomic" on PA-RISC.
    It is _possible_ that is 8 byte (64-bit) on later PA-RISC.

    Some of the docs at www.parisc-linux.org may have something to say on
    the topic if nothing in docs.hp.com does, nor web searching.

    rick jones
    --
    web2.0 n, the dot.com reunion tour...
    these opinions are mine, all mine; HP might not want them anyway...
    feel free to post, OR email to rick.jones2 in hp.com but NOT BOTH...

  5. Re: size of atomic memory read/write

    Thanks for the pointer to the docs. It's very helpful. Basically the
    load and store instructions are atomic. So unless the compiler uses
    multiple STORE BYTE instructions for the store of a single word or
    doubleword (cannot imagine it'll do that), it is atomic to read/write
    a word or double word.

    -DYZ

    Rick Jones wrote in
    news:VpN6h.2529$JM4.929@news.cpqcorp.net:

    > DYZ wrote:
    >> Rick Jones wrote in news:IaL6h.2513$OF4.960
    >> @news.cpqcorp.net:

    >
    >>> DYZ wrote:
    >>>> I don't know much about HP machine's architecture. Does anyone know
    >>>> if HP's SMP has weakly or strongly consistent memory? Also,if the
    >>>> data is aligned, at what size does it guarantee atomic read/write
    >>>> to the data?
    >>>
    >>> I'm not sure if the answer is different, but are you talking about
    >>> PA-RISC or Itanium? HP-UX runs on both.
    >>>
    >>> rick jones

    >
    >> Let's first assume this is on PA-RISC, but I'm more than happy to
    >> know the answer for both. Thanks again!

    >
    > Well at the considerable risk of being wrong I believe that
    > four-byte reads/writes on a four-byte bondary are "atomic" on PA-RISC.
    > It is _possible_ that is 8 byte (64-bit) on later PA-RISC.
    >
    > Some of the docs at www.parisc-linux.org may have something to say on
    > the topic if nothing in docs.hp.com does, nor web searching.
    >
    > rick jones



  6. Re: size of atomic memory read/write

    DYZ wrote:
    > Thanks for the pointer to the docs. It's very helpful. Basically the
    > load and store instructions are atomic. So unless the compiler uses
    > multiple STORE BYTE instructions for the store of a single word or
    > doubleword (cannot imagine it'll do that)


    If you ask it to pack things or tell it to support unaligned stuff it
    will

    rick jones
    --
    The glass is neither half-empty nor half-full. The glass has a leak.
    The real question is "Can it be patched?"
    these opinions are mine, all mine; HP might not want them anyway...
    feel free to post, OR email to rick.jones2 in hp.com but NOT BOTH...

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