Should I Believe /proc/cpuinfo ? - Embedded

This is a discussion on Should I Believe /proc/cpuinfo ? - Embedded ; i got a board build around samsung's S3C2410 ( might be 2410a, i am not pretty sure ) which in turn build on ARM920T core. Both in ARM920T's specification and S3C210's specification, i get know the processor core has seperated ...

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Thread: Should I Believe /proc/cpuinfo ?

  1. Should I Believe /proc/cpuinfo ?

    i got a board build around samsung's S3C2410 ( might be 2410a, i am not
    pretty sure ) which in turn build on ARM920T core.

    Both in ARM920T's specification and S3C210's specification, i get know
    the processor core has seperated 16k 64-way set-association data cache
    and instruction cache. but, in the /proc/cpuinfo, i see,

    Processor : ARM/CIRRUS Arm920Tsid(wb) rev 0 (v4l)
    BogoMIPS : 99.94
    Features : swp half thumb
    CPU implementor : 0x41
    CPU architecture: 4T
    CPU variant : 0x1
    CPU part : 0x920
    CPU revision : 0
    Cache type : write-back
    Cache clean : cp15 c7 ops
    Cache lockdown : format A
    Cache unified : harvard
    I size : 8192
    I assoc : 32
    I line length : 32
    I sets : 8
    D size : 8192
    D assoc : 32
    D line length : 32
    D sets : 8

    the info above indicates that the instruction cache and data cache is
    8k 32-way set-association. i am wondering which information is right?
    and, how the linux generated the cpuinfo file?

    thanks.

    -
    woody


  2. Re: Should I Believe /proc/cpuinfo ?

    The ARM920T's specification and S3C210's specification are right.

    On 11月21日, 下午3时26分, "Steven Woody"
    wrote:
    > i got a board build around samsung's S3C2410 ( might be 2410a, i am not
    > pretty sure ) which in turn build on ARM920T core.
    >
    > Both in , i get know
    > the processor core has seperated 16k 64-way set-association data cache
    > and instruction cache. but, in the /proc/cpuinfo, i see,
    >
    > Processor : ARM/CIRRUS Arm920Tsid(wb) rev 0 (v4l)
    > BogoMIPS : 99.94
    > Features : swp half thumb
    > CPU implementor : 0x41
    > CPU architecture: 4T
    > CPU variant : 0x1
    > CPU part : 0x920
    > CPU revision : 0
    > Cache type : write-back
    > Cache clean : cp15 c7 ops
    > Cache lockdown : format A
    > Cache unified : harvard
    > I size : 8192
    > I assoc : 32
    > I line length : 32
    > I sets : 8
    > D size : 8192
    > D assoc : 32
    > D line length : 32
    > D sets : 8
    >
    > the info above indicates that the instruction cache and data cache is
    > 8k 32-way set-association. i am wondering which information is right?
    > and, how the linux generated the cpuinfo file?
    >
    > thanks.
    >
    > -
    > woody



  3. Re: Should I Believe /proc/cpuinfo ?


    山之岚 wrote:
    > The ARM920T's specification and S3C210's specification are right.


    but how to explain linux's report?

    -
    woody


  4. Re: Should I Believe /proc/cpuinfo ?

    Steven Woody wrote:
    > 山之岚 wrote:
    >> The ARM920T's specification and S3C210's specification are right.

    >
    > but how to explain linux's report?


    Use the source, Luke. Nobody here knows what kernel you're running or
    what modifications have been made to the source, except you.


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