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AMD invites industry to ride its processor bus


Rick Merritt
EE Times
(06/01/2006 6:03 PM EDT)

SUNNYVALE, Calif. — Advanced Micro Devices Inc. Thursday (June 1) said it
will license its processor bus, the coherent version of the HyperTransport
interconnect.

Other chip makers can use the link to build co-processors that plug into
one of AMD’s CPU sockets or, someday, even become blocks in one of AMD’s
chips, the company announced at its twice yearly analyst day here.

Among other news at the event, AMD disclosed plans for a 65-nm notebook
processor. It also revealed new details about its upcoming four-core
processor that opens the door to multiprocessing systems packing as many
as eight CPU chips.

In fact, AMD announced a dizzying array of new products and technologies.
In addition, AMD also updated its aggressive process technology roadmap,
although the company remains slightly behind microprocessor rival Intel
Corp.

None of the announcements is likely to significantly alter the competitive
balance between AMD and its archrival Intel. But taken together they show
a company aggressively innovating and executing well on many fronts as it
tries to take ever more market share away from the world’s largest
semiconductor maker.

The biggest surprise of the day was AMD’s decision to openly license its
proprietary version of HyperTransport. The move could attract more silicon
innovation around AMD-based computers and help the company prime a
pipeline for future CPU features that accelerate media, security,
networking, XML, Java and more.

HyperTransport has long been an open, parallel chip-to-chip interconnect.
But AMD has until today held tightly to its proprietary coherent version
which let’s processors communicate directly, sharing cache data.

"We are taking a very bold step by opening up our architecture. We know
our competition will not do this," said Marty Seyer, senior vice president
of AMD’s commercial business unit.

AMD will decide over the next 60 days whether it will make the technology
available through the existing HyperTransport Consortium or a new adjunct
group created for the purpose. A set of applications programming
interfaces for HyperTransport co-processors is also in development.

So far only Cray and Newisys have licensed the technology for use with
high-end interconnect chips in their own multiprocessing systems. A broad
group of co-processor vendors and OEMs expressed support for opening up
the technology including IBM, Hewlett-Packard, Sun Microsystems and
startup XML co-processor startup Tarari.

Separately, AMD disclosed it is working on two versions of a dual-core
65-nm notebook CPU which will emerge in mid-2007. The company claims it
will require 40 to 60 percent less power than its current Turion CPUs when
measured on an average range of applications.

Enhancements come mainly in the form of a new memory controller and power
management technology geared for mobile systems. The chip will also sport
split power planes and—like other next-generation AMD CPUs—an ability to
power down individual cores independently based on workloads.

At the high end, AMD provided some more details on its four-core processor
for desktop and server systems also to debut in 2007. The CPU will sport
four instead of three HyperTransport links, using the version 3.0 of the
technology announced earlier this year and at least 2Mbytes shared L3
cache.

The changes mean OEMs will be able to efficiently build computers using
eight chips. Currently optimal configurations for high-end AMD servers use
four chips. The combination of more chips per system and more cores per
chip pushes AMD deeper into high-end server territory where it will
compete with Intel’s Itanium processor.

CEO Hector Ruiz said he wants to company to capture 30 percent of the x86
server business. According to Gartner Group the company currently has
about 22 percent.

Overall, AMD says it still maintains a lead over Intel in
performance-per-watt, though it appears that lead may shrink significantly
as Intel rolls on its next-generation Core 2 Duo architecture over the
next 12 months. Based on one AMD server comparison, the company could have
as little as a 15-percent lead over Intel in systems-level power
consumption, much of it attributable to Intel’s use of power-hungry,
fully-buffered DIMMs.

"We have the best x86 execution engine today, and we will have the best
one next year," said Dirk Meyer, AMD’s chief operating officer. "We have a
lot of great engineers and they haven’t been sleeping," he added.




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