How many SIG/M disks where there? - CP/M

This is a discussion on How many SIG/M disks where there? - CP/M ; glen herrmannsfeldt schrieb: > Udo Munk wrote: > (snip) > >> The definition of 8/16 bit CPU's is done with the width of the data >> bus, not width of internal registers. If the later would be the case >> ...

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Thread: How many SIG/M disks where there?

  1. Re: How many SIG/M disks where there?

    glen herrmannsfeldt schrieb:
    > Udo Munk wrote:
    > (snip)
    >
    >> The definition of 8/16 bit CPU's is done with the width of the data
    >> bus, not width of internal registers. If the later would be the case
    >> then the 8080 was a 16 but CPU already, because it has 16 bit registers.
    >> The 8088 is a CPU with 8 bit data bus.

    >
    > As I said before, data bus width, address bus width, ALU width,
    > and register width can all be important.


    Of course are they important.

    > The 8080 A register is 8 bits, and most operations only work on A.


    The Z80 A register is 8 bits, not most operations only work on A, but on
    BC, DE, and HL as well. So we redefine it as a 16 bit CPU now?

    > The 8088 AX register is 16 bits. Most operations work on AX.


    Yep, is a pretty bad limitation anyway, because CPU's like 11, 68k,
    sparc, ppc have universal register sets, allowing all operations on most
    registers.

    > Address bus tends to be less useful of a measure, as it doesn't
    > correlate so well. The 4004 didn't have a four bit address bus
    > for obvious reasons. ALU width and primary register width tend
    > to be the same, and are usually the most important indicators.
    >
    > For 64 bit processors, address width (not necessarily address bus)
    > tends to be most important. It isn't that hard to do 64 bit
    > math on most 32 bit processors, though a little slower.
    > For large address space, 64 bits is pretty significant, though.
    >
    > -- glen


    All CPU's can do operations on data wider than their registers. And the
    address bus is a different issue. The 64 bit machines use address buses
    of 128 and 256 bit already.

    Udo Munk
    --
    The real fun is building it and then using it...

  2. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net schrieb:
    > On Fri, 25 Jul 2008 18:24:27 +0200, Udo Munk
    > wrote:
    >
    >> glen herrmannsfeldt schrieb:
    >>> Udo Munk wrote:
    >>> (snip)
    >>>
    >>>> So you know that the 1st edition of Minix was implemented on computers
    >>>> with a 8088 processor and that Andy also provided an 8088 emulation,
    >>>> that was able to run it on larger machines. This 8088 processor was a
    >>>> 8bit CPU. Lucky you that you decided to never uses it, I did by the
    >>>> way, native on a 8088 system and cross on a 32bit UNIX platform.
    >>> The 8088 is a 16 bit CPU with an 8 bit bus interface.
    >>>
    >>> -- glen
    >>>

    >> The definition of 8/16 bit CPU's is done with the width of the data bus,
    >> not width of internal registers. If the later would be the case then the
    >> 8080 was a 16 but CPU already, because it has 16 bit registers.
    >> The 8088 is a CPU with 8 bit data bus.
    >>

    >
    > Sorry no, I never heard of that definition.


    No? Other have. Here the 8088 - 8-BIT HMOS MICROPROCESSOR - Intel
    Corporation datasheet:
    http://www.alldatasheet.com/datashee...NTEL/8088.html

    Intel describes it as a 8 bit processor with internal 16 bit
    capabilities, which it is, like others too.


    > If that were the case a PIC24 is a 0 bit cpu as there is no bus?
    > [Its a 24bit modified Harvard single chip MPU with 8bit internal data
    > busses for data and wider busses for instruction and address]
    >
    > 8080, 8085 and Z80 had some 16 bit operations (DAD) but
    > [it used HL and not the accumulator] the fact that register were
    > 16bits were more an artifact that were data pointers and the
    > address bus was 16bits. There are very few instructions
    > that acutally work on 16bit data (z80 added some) but most
    > instructions were limited to 8bit.
    >
    > 8088 can move both bytes and words and the BIU [Bus Interface Unit]
    > manages the byte word fetch. The differences in the 8086 and 8088 are
    > generally limited to the BIU and not the core cpu. That doen't mean
    > there isn't a speed penalty however. I does mean any code developed
    > for the 8086 can and does run on 8088 and if there are differneces
    > it's speed related. This is also true for the 80186 and 80188.
    >
    > Bus width speaks more to throughput and interfacing concerns
    > not base archectecture.


    Well, you define it different than the manufacturers of CPU's in their
    datasheets. Maybe everyone should add the formula used to calculate the
    bit value of the CPU, so that it can be calculated back to some common
    definition.

    > Allison


    Udo Munk
    --
    The real fun is building it and then using it...

  3. Re: How many SIG/M disks where there?

    Axel Berger schrieb:
    > *Udo Munk* wrote on Fri, 08-07-25 18:24:
    >> The definition of 8/16 bit CPU's is done with the width of the data bus,
    >> not width of internal registers.

    >
    > So for you the 68008 is an 8-bit CPU? I think that's nonsense.


    Link to original Motorola M68000 8-/16-/32-Bit Microprocessor Users Manual:
    http://www.freescale.com/files/32bit.../MC68000UM.pdf

    I'm sorry that Motorola writes nonsense like 68008 is a 8 bit processor,
    with internal 32 bit archtitecture. Please make them fix their
    datasheets, so that I won't read nonsense and even repeat it here ;-)

    > The 8080 does not have 16 bit data registers but the ability to perform
    > some operations on register pairs. Contrary to e.g. the 68000 its
    > registers are not equal, there is one main register and that's 8-bit
    > with another 8 bits for flags.


    So?

    Udo Munk
    --
    The real fun is building it and then using it...

  4. Re: How many SIG/M disks where there?

    Axel Berger schrieb:
    > *Udo Munk* wrote on Fri, 08-07-25 18:24:
    >> The definition of 8/16 bit CPU's is done with the width of the data bus,
    >> not width of internal registers.

    >
    > So for you the 68008 is an 8-bit CPU? I think that's nonsense.
    > The 8080 does not have 16 bit data registers but the ability to perform
    > some operations on register pairs. Contrary to e.g. the 68000 its
    > registers are not equal, there is one main register and that's 8-bit
    > with another 8 bits for flags.


    I can make it even worse:

    The 8086 does not have 16 bit data registers, but the ability to perform
    some operations on register pairs.

    +--+--+
    |AH|AL| AX - Acumulator
    +--+--+
    |BH|BL| BX - Base
    ....
    ....


    Udo Munk
    --
    The real fun is building it and then using it...

  5. Re: How many SIG/M disks where there?

    On Sat, 26 Jul 2008 12:22:02 +0200, Udo Munk
    wrote:

    >no.spam@no.uce.bellatlantic.net schrieb:
    >> On Fri, 25 Jul 2008 18:24:27 +0200, Udo Munk
    >> wrote:
    >>
    >>> glen herrmannsfeldt schrieb:
    >>>> Udo Munk wrote:
    >>>> (snip)
    >>>>
    >>>>> So you know that the 1st edition of Minix was implemented on computers
    >>>>> with a 8088 processor and that Andy also provided an 8088 emulation,
    >>>>> that was able to run it on larger machines. This 8088 processor was a
    >>>>> 8bit CPU. Lucky you that you decided to never uses it, I did by the
    >>>>> way, native on a 8088 system and cross on a 32bit UNIX platform.
    >>>> The 8088 is a 16 bit CPU with an 8 bit bus interface.
    >>>>
    >>>> -- glen
    >>>>
    >>> The definition of 8/16 bit CPU's is done with the width of the data bus,
    >>> not width of internal registers. If the later would be the case then the
    >>> 8080 was a 16 but CPU already, because it has 16 bit registers.
    >>> The 8088 is a CPU with 8 bit data bus.
    >>>

    >>
    >> Sorry no, I never heard of that definition.

    >
    >No? Other have. Here the 8088 - 8-BIT HMOS MICROPROCESSOR - Intel
    >Corporation datasheet:
    >http://www.alldatasheet.com/datashee...NTEL/8088.html
    >
    >Intel describes it as a 8 bit processor with internal 16 bit
    >capabilities, which it is, like others too.
    >
    >
    >> If that were the case a PIC24 is a 0 bit cpu as there is no bus?
    >> [Its a 24bit modified Harvard single chip MPU with 8bit internal data
    >> busses for data and wider busses for instruction and address]
    >>
    >> 8080, 8085 and Z80 had some 16 bit operations (DAD) but
    >> [it used HL and not the accumulator] the fact that register were
    >> 16bits were more an artifact that were data pointers and the
    >> address bus was 16bits. There are very few instructions
    >> that acutally work on 16bit data (z80 added some) but most
    >> instructions were limited to 8bit.
    >>
    >> 8088 can move both bytes and words and the BIU [Bus Interface Unit]
    >> manages the byte word fetch. The differences in the 8086 and 8088 are
    >> generally limited to the BIU and not the core cpu. That doen't mean
    >> there isn't a speed penalty however. I does mean any code developed
    >> for the 8086 can and does run on 8088 and if there are differneces
    >> it's speed related. This is also true for the 80186 and 80188.
    >>
    >> Bus width speaks more to throughput and interfacing concerns
    >> not base archectecture.

    >
    >Well, you define it different than the manufacturers of CPU's in their
    >datasheets. Maybe everyone should add the formula used to calculate the
    >bit value of the CPU, so that it can be calculated back to some common
    >definition.


    No I define it basd on archetecture and 8088 is 16bit. The fact that
    the bus is 8bit is relevent and important to other things like all
    16bit fetches will be handled as two byte fetches.

    If I used data bus width I then:

    If 8088 is 8bit then...
    68008 is 8bit
    Z280 is 16bit when the bus width is set to 16bits.
    T-11 (dec pdp11 on a chip ) is 8bit when bus is set o 8bit
    386SLC and 486SLC are 16bit (these use narrow bus and the
    addressbuts is not 32 bits either)

    Intel even says in that same data sheet the archectecture is 16bit.
    I have a the 1979 intel 8086 family databook..

    Calling the 8088 8bit was a marketing ploy to get people to adopt the
    8086 archecture over faster Z80s, Z8000. One only has to look at the
    8088 datasheet list of bullets it's very pominent that they are
    pushing it as 16bit archetecture. To make the point Intel could have
    done what Zilog did with the Z280 and created a version of the 8086
    with a 32 bit bus that does double word fetches each memory cycle
    but to the programmer it's still a 16bitter. Intel and others did
    and will continue to wrap external interfaces around cpus to affect
    price, pinout, bus thoughput.

    What if the data bus were serial as in no external parallel? Hint
    it's been done. We can't call the result a 1bit cpu.

    Bus width is a feature related to throughput and cost. Archetecture
    and resulting instruction set define the cpu.

    Allison
    >
    >> Allison

    >
    >Udo Munk



  6. Re: How many SIG/M disks where there?

    On Sat, 26 Jul 2008 12:05:26 +0200, Udo Munk
    wrote:

    >glen herrmannsfeldt schrieb:
    >> Udo Munk wrote:
    >> (snip)
    >>
    >>> The definition of 8/16 bit CPU's is done with the width of the data
    >>> bus, not width of internal registers. If the later would be the case
    >>> then the 8080 was a 16 but CPU already, because it has 16 bit registers.
    >>> The 8088 is a CPU with 8 bit data bus.

    >>
    >> As I said before, data bus width, address bus width, ALU width,
    >> and register width can all be important.

    >
    >Of course are they important.
    >
    >> The 8080 A register is 8 bits, and most operations only work on A.

    >
    >The Z80 A register is 8 bits, not most operations only work on A, but on
    >BC, DE, and HL as well. So we redefine it as a 16 bit CPU now?
    >
    >> The 8088 AX register is 16 bits. Most operations work on AX.

    >
    >Yep, is a pretty bad limitation anyway, because CPU's like 11, 68k,
    >sparc, ppc have universal register sets, allowing all operations on most
    >registers.
    >
    >> Address bus tends to be less useful of a measure, as it doesn't
    >> correlate so well. The 4004 didn't have a four bit address bus
    >> for obvious reasons. ALU width and primary register width tend
    >> to be the same, and are usually the most important indicators.
    >>
    >> For 64 bit processors, address width (not necessarily address bus)
    >> tends to be most important. It isn't that hard to do 64 bit
    >> math on most 32 bit processors, though a little slower.
    >> For large address space, 64 bits is pretty significant, though.
    >>
    >> -- glen

    >
    >All CPU's can do operations on data wider than their registers. And the
    >address bus is a different issue. The 64 bit machines use address buses
    >of 128 and 256 bit already.


    Udo, are you sure of that?

    I know some of the 64 bitters are using 128bit (or wider) data buses
    to affect better bus throughput and reduce contention but last I
    checked 64bits of address was adaquate as no one has made a machine
    with a single array of ram in the 1 terabyte of ram and 64 bits
    addresses a lot more than that.

    FYI assuming 1 terabyte of ram as 128 bits wide (16bytes wide) at 4ghz
    cpu (assume one clock per cycle and a memory that fast too) would take
    250 seconds to clear all memory. However using current memory and cpu
    technology that would take over 20 minutes! The point being that
    computing technology as we know it has bandwidth restrictions and
    speed limits that make some dimensions like a 64bit address bus nice
    on paper but impractical to use without
    unconventional forms of computers.


    Allison

    >Udo Munk



  7. Re: How many SIG/M disks where there?

    On Sat, 26 Jul 2008 13:23:46 +0200, Udo Munk
    wrote:

    >Axel Berger schrieb:
    >> *Udo Munk* wrote on Fri, 08-07-25 18:24:
    >>> The definition of 8/16 bit CPU's is done with the width of the data bus,
    >>> not width of internal registers.

    >>
    >> So for you the 68008 is an 8-bit CPU? I think that's nonsense.
    >> The 8080 does not have 16 bit data registers but the ability to perform
    >> some operations on register pairs. Contrary to e.g. the 68000 its
    >> registers are not equal, there is one main register and that's 8-bit
    >> with another 8 bits for flags.

    >
    >I can make it even worse:
    >
    >The 8086 does not have 16 bit data registers, but the ability to perform
    >some operations on register pairs.
    >
    >+--+--+
    >|AH|AL| AX - Acumulator
    >+--+--+
    >|BH|BL| BX - Base
    >...
    >...


    Yes subsetting register to less than the native length is a
    desireable option and archetectual benefit.

    It's also a trap. Z80 can operate on 4bit data ...

    Allison
    >
    >
    >Udo Munk



  8. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net schrieb:

    >> All CPU's can do operations on data wider than their registers. And the
    >> address bus is a different issue. The 64 bit machines use address buses
    >> of 128 and 256 bit already.

    >
    > Udo, are you sure of that?
    >
    > I know some of the 64 bitters are using 128bit (or wider) data buses
    > to affect better bus throughput and reduce contention but last I
    > checked 64bits of address was adaquate as no one has made a machine
    > with a single array of ram in the 1 terabyte of ram and 64 bits
    > addresses a lot more than that.


    Why do you ask me if you know the answer already? You will find lots of
    unexpensive x86-64 machines with memory buses of 128 and 256 bit.
    For the little database servers with some TB database this is ok. The
    memory width is used so that multiple 64 bit CPU's can address memory
    all at the same time. Else every CPU would have to wait for the others
    doing their 64 bit access. No good if I can have a machine for home
    usage, that includes cores with 4 full featured 64 bit CPU's on a single
    chip.

    Must be pretty long time ago you checked. Try list of 500 fastest
    computers worldwide. Systems exist with >10TB RAM since a couple of years.

    > FYI assuming 1 terabyte of ram as 128 bits wide (16bytes wide) at 4ghz
    > cpu (assume one clock per cycle and a memory that fast too) would take
    > 250 seconds to clear all memory. However using current memory and cpu
    > technology that would take over 20 minutes! The point being that
    > computing technology as we know it has bandwidth restrictions and
    > speed limits that make some dimensions like a 64bit address bus nice
    > on paper but impractical to use without
    > unconventional forms of computers.
    >
    >
    > Allison
    >
    >> Udo Munk


    Well, thanks for that information. Unfortunately secondary storage is
    factor several thousand worse than that. So machines are build with
    >10TB of RAM, to get the computations done in half way acceptable time.


    Get an actual 2 or 4 core 64 bit system with a 128 or 256 bit address
    bus. It's affordable for home usage and then see you self how
    impractical to use the machine is. Hm, please don't install a 32 bit
    Windows designed for home entertainment on it, because that will be very
    impractical!

    Udo Munk
    --
    The real fun is building it and then using it...

  9. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net schrieb:
    > No I define it basd on archetecture and 8088 is 16bit. The fact that
    > the bus is 8bit is relevent and important to other things like all
    > 16bit fetches will be handled as two byte fetches.


    OK, you then use the definition of the marketing guys, I use the
    definition of the technical guys, written down on datasheets.

    > If I used data bus width I then:
    >
    > If 8088 is 8bit then...

    This is what the datasheet for the CPU says, can be read here:
    http://www.alldatasheet.com/datashee...NTEL/8088.html

    > 68008 is 8bit

    This is what the datasheet says, can be read here:
    http://www.freescale.com/files/32bit.../MC68000UM.pdf

    > Z280 is 16bit when the bus width is set to 16bits.

    This is what the datasheet says, can be read here:
    http://datasheets.chipdb.org/Zilog/z280_manual.pdf

    > T-11 (dec pdp11 on a chip ) is 8bit when bus is set o 8bit
    > 386SLC and 486SLC are 16bit (these use narrow bus and the
    > addressbuts is not 32 bits either)
    >
    > Intel even says in that same data sheet the archectecture is 16bit.
    > I have a the 1979 intel 8086 family databook..


    Please Allison, Intel says it is a 8 bit processor with INTERNAL 16 bit
    architecure. Motorola says the 68008 is a 8 bit processor with INTERNAL
    32 bit architecture. Can be read in their datasheets, word by word, so
    lets use the correct technical terms for this things.

    > Calling the 8088 8bit was a marketing ploy to get people to adopt the
    > 8086 archecture over faster Z80s, Z8000. One only has to look at the
    > 8088 datasheet list of bullets it's very pominent that they are
    > pushing it as 16bit archetecture. To make the point Intel could have
    > done what Zilog did with the Z280 and created a version of the 8086
    > with a 32 bit bus that does double word fetches each memory cycle
    > but to the programmer it's still a 16bitter. Intel and others did
    > and will continue to wrap external interfaces around cpus to affect
    > price, pinout, bus thoughput.


    Oh and I always though that the marketing guys tried to sell me a 16bit
    computer (what they claimed), when they wanted me to buy their 8088 8
    bit system ;-) Fortunately the manufacturer was fair enough to say that
    it's an 8 bit thingy in the specs and I always want the technical specs
    from the marketing guys, so that I'm able to avoid pretty bad marketing
    jokes and get into the real stuff instead. And good it was, because
    others got talked into buying this "16 bit" wonder machine and I had
    them compare it with properly designed 8 bit systems, guess with what
    results.

    Oh, I also didn't believe in the "32 bit" wonder machine 386SX. I read
    the specs instead and got a true 32 bit system 386DX. And guess what,
    good I trusted the specs and not some marketing blah ;-)

    > What if the data bus were serial as in no external parallel? Hint
    > it's been done. We can't call the result a 1bit cpu.


    Tell us what the manufacturer of the CPU has to say about it.

    > Bus width is a feature related to throughput and cost. Archetecture
    > and resulting instruction set define the cpu.


    So will you buy a 1024 bit CPU from me with an address range of 1PB?
    I can build it for you, unfortunately INTERNALY it will be based on 64
    bit architecture and unfortunately most of the 1PB storage will be on
    external storage. Magneto-mechanical storage of course, because it is
    less expensive. Well, you can start to program the Enterprise holo deck
    with the machine. The output will be a little be slow, but at the time
    you finished the software I might be able to sell you more appropriate
    hardware to operate the thing. Now if I could lie better I won't say
    that the internals are 64 bit only, and of course you won't get the
    output needed for a holo deck from the thing. But then again, I'm not a
    marketing guy, and you probably want the specs for the machine before
    you order one ;-)

    >
    > Allison
    >>> Allison

    >> Udo Munk

    >


    Udo Munk
    --
    The real fun is building it and then using it...

  10. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net schrieb:

    >> The 8086 does not have 16 bit data registers, but the ability to perform
    >> some operations on register pairs.
    >>
    >> +--+--+
    >> |AH|AL| AX - Acumulator
    >> +--+--+
    >> |BH|BL| BX - Base
    >> ...
    >> ...

    >
    > Yes subsetting register to less than the native length is a
    > desireable option and archetectual benefit.


    That never was an architectural benefit or a desirable option, we know
    this from ancient 16 bit systems, doing better without that.
    In the 21th century also Intel got mercy with the users of their
    machines and did away with that. IA-64 is all 64 bit wide.

    > It's also a trap. Z80 can operate on 4bit data ...


    ;-)

    > Allison


    Udo Munk
    --
    The real fun is building it and then using it...

  11. Re: How many SIG/M disks where there?

    --{ Udo Munk a plopé ceci: }--

    > No? Other have. Here the 8088 - 8-BIT HMOS MICROPROCESSOR - Intel
    > Corporation datasheet:
    > http://www.alldatasheet.com/datashee...NTEL/8088.html
    >
    > Intel describes it as a 8 bit processor with internal 16 bit
    > capabilities, which it is, like others too.
    >

    At this time, beeing compliant with the 8bit world was a
    marketing attitude, no ?


    --
    Q: Why did the chicken cross the Moebius strip?
    A: To get to the other ... er, um ...

  12. Re: How many SIG/M disks where there?

    glen herrmannsfeldt schrieb:
    > Udo Munk wrote:
    > (snip)
    >
    >> The 8086 does not have 16 bit data registers, but the ability to
    >> perform some operations on register pairs.

    >
    > No, it has 16 bit registers with the ability to
    > operate on only half of a register.
    >
    > -- glen
    >


    Yes I know that, but argumentation before was, that if such questionable
    8/16 bit thingies have more 8 bit instructions than 16 bit
    instructions, it must be a 8 bit thingie.
    This thingie has two 8 bit ops for each register half and one 16 bit op
    for the full register. So it has twice as much 8 bit ops than 16 bit
    ops, so this must be an 8 bit CPU. Sounds logical?

    Udo Munk
    --
    The real fun is building it and then using it...

  13. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net wrote:
    (snip, someone wrote)

    >>All CPU's can do operations on data wider than their registers. And the
    >>address bus is a different issue. The 64 bit machines use address buses
    >>of 128 and 256 bit already.


    > I know some of the 64 bitters are using 128bit (or wider) data buses
    > to affect better bus throughput and reduce contention but last I
    > checked 64bits of address was adaquate as no one has made a machine
    > with a single array of ram in the 1 terabyte of ram and 64 bits
    > addresses a lot more than that.


    The data bus width has been growing for a while, address
    bus much slower.

    Original pentium has a 64 bit data bus, and I think the external
    bus of newer IA32 processors is still 64 bits. Transfers between
    cache levels may be wider. The address bus has been 36 bits from
    pentium-pro through most of the later IA32s.

    The 64 bit processors have a 64 bit address architecture, but
    none that I know of implement all the bits on the external
    address bus.

    Oh, that is what I forgot in my geometric mean. It should
    have both virtual address width and physical address width,
    along with data bus width and ALU width.

    virtual physical data ALU geometric
    address address bus width width mean

    8080 16 16 8 8 11.3
    8088 20 20 8 16 15.0
    8086 20 20 16 16 17.9
    80286 29 24 16 16 20.5
    80386 45 32 32 32 34.8
    Pentium 45 32 64 32 41.4
    Pentium-Pro 45 36 64 32 42.7

    -- glen


  14. Re: How many SIG/M disks where there?

    no.spam@no.uce.bellatlantic.net wrote:
    (snip)

    > Calling the 8088 8bit was a marketing ploy to get people to adopt the
    > 8086 archecture over faster Z80s, Z8000. One only has to look at the
    > 8088 datasheet list of bullets it's very pominent that they are
    > pushing it as 16bit archetecture. To make the point Intel could have
    > done what Zilog did with the Z280 and created a version of the 8086
    > with a 32 bit bus that does double word fetches each memory cycle
    > but to the programmer it's still a 16bitter. Intel and others did
    > and will continue to wrap external interfaces around cpus to affect
    > price, pinout, bus thoughput.


    Yes, it means that 8 bit peripheral hardware could be
    used, and people were more used to designing with that.
    Things like floppy controllers with an 8 bit data bus,
    and 8 bit wide memory.

    That made development of the IBM PC faster, and also less
    competition for IBM's other computers.

    To software, it looks exactly like the 8086, except you have
    to be careful when writing self-modifying code.

    -- glen


  15. Re: How many SIG/M disks where there?

    Udo Munk wrote:
    (snip)

    > The 8086 does not have 16 bit data registers, but the ability to perform
    > some operations on register pairs.


    No, it has 16 bit registers with the ability to
    operate on only half of a register.

    -- glen


  16. Re: How many SIG/M disks where there?

    glen herrmannsfeldt schrieb:

    > The 64 bit processors have a 64 bit address architecture, but
    > none that I know of implement all the bits on the external
    > address bus.


    Of course not, that would address ~17 billion gigabytes of memory.
    Good ones have 40 address lines to be able to address 1TB physically.

    > Oh, that is what I forgot in my geometric mean. It should
    > have both virtual address width and physical address width,
    > along with data bus width and ALU width.
    >
    > virtual physical data ALU geometric
    > address address bus width width mean
    >
    > 8080 16 16 8 8 11.3
    > 8088 20 20 8 16 15.0
    > 8086 20 20 16 16 17.9
    > 80286 29 24 16 16 20.5
    > 80386 45 32 32 32 34.8
    > Pentium 45 32 64 32 41.4
    > Pentium-Pro 45 36 64 32 42.7
    >
    > -- glen
    >


    If you add the 6809 and the Z80 you would get the same geometric mean
    than for the 8080. Both were considered much more advanced than the
    8080. This geometric mean is useless.

    Udo Munk
    --
    The real fun is building it and then using it...

  17. Re: How many SIG/M disks where there?

    Udo Munk wrote:
    (snip on AX vs AL)

    > Yes I know that, but argumentation before was, that if such questionable
    > 8/16 bit thingies have more 8 bit instructions than 16 bit
    > instructions, it must be a 8 bit thingie.
    > This thingie has two 8 bit ops for each register half and one 16 bit op
    > for the full register. So it has twice as much 8 bit ops than 16 bit
    > ops, so this must be an 8 bit CPU. Sounds logical?


    I haven't counted recently, but many instructions use AX other
    than just move instructions. If you want to count them, though,
    it is how many instructions for each register, not for all half
    registers. That is, how many for AL vs AX, not (AL+AH+BL+...)
    vs AX. Though much of that was added to the 8086 to allow
    for 8080 source compatibility. It is supposed to work out
    that, with the right assembler, you can assemble 8080 code
    to run on the 8086. Also, that is why I include ALU
    width in my geometric mean calculation.

    Even better, it should be weighted on actual instruction usage.

    -- glen


  18. Re: How many SIG/M disks where there?

    Udo Munk schrieb:

    > Of course not, that would address ~17 billion gigabytes of memory.
    > Good ones have 40 address lines to be able to address 1TB physically.


    Just re-read, the current ones already have 48 address lines, next
    generation planned will have 56, ops. So right now one can build a
    machine with 128TB memory. Not supported with Windows, some UNIX's do.

    Udo Munk
    --
    The real fun is building it and then using it...

  19. Re: How many SIG/M disks where there?

    glen herrmannsfeldt schrieb:
    > Udo Munk wrote:
    > (snip on AX vs AL)
    >
    >> Yes I know that, but argumentation before was, that if such
    >> questionable 8/16 bit thingies have more 8 bit instructions than 16
    >> bit instructions, it must be a 8 bit thingie.
    >> This thingie has two 8 bit ops for each register half and one 16 bit
    >> op for the full register. So it has twice as much 8 bit ops than 16
    >> bit ops, so this must be an 8 bit CPU. Sounds logical?

    >
    > I haven't counted recently, but many instructions use AX other
    > than just move instructions. If you want to count them, though,
    > it is how many instructions for each register, not for all half
    > registers. That is, how many for AL vs AX, not (AL+AH+BL+...)


    You are cheating. INC AH is another op code than INC AL, which is
    another op code than INC AX. That is 2:1, as with quite a lot of ops.

    > vs AX. Though much of that was added to the 8086 to allow
    > for 8080 source compatibility. It is supposed to work out
    > that, with the right assembler, you can assemble 8080 code
    > to run on the 8086. Also, that is why I include ALU
    > width in my geometric mean calculation.


    Not that easy probably, because 8080 to 8086 converters were used.
    Is there such an assembler? Just wondering, because even Intel used an
    8080 to 8086 converter under Isis.

    > Even better, it should be weighted on actual instruction usage.
    >
    > -- glen


    Well, if you can manipulate statistics at your will, of course I can do
    too. So I will write programs that always will do MOV AH,x, MOV AL,y
    instead of MOV AX,zz. If you count instruction usage on the rubbish it
    will be all 8 bit instructions only and that is the prove then ;-)
    Could even make sense if the data can't be properly aligned for some
    reason and the 16 bit instruction would get a hefty execution time penalty.

    Udo Munk
    --
    The real fun is building it and then using it...

  20. Re: How many SIG/M disks where there?

    glen herrmannsfeldt schrieb:
    > no.spam@no.uce.bellatlantic.net wrote:
    > (snip)
    >
    >> Calling the 8088 8bit was a marketing ploy to get people to adopt the
    >> 8086 archecture over faster Z80s, Z8000. One only has to look at the
    >> 8088 datasheet list of bullets it's very pominent that they are
    >> pushing it as 16bit archetecture. To make the point Intel could have
    >> done what Zilog did with the Z280 and created a version of the 8086
    >> with a 32 bit bus that does double word fetches each memory cycle
    >> but to the programmer it's still a 16bitter. Intel and others did
    >> and will continue to wrap external interfaces around cpus to affect
    >> price, pinout, bus thoughput.

    >
    > Yes, it means that 8 bit peripheral hardware could be
    > used, and people were more used to designing with that.
    > Things like floppy controllers with an 8 bit data bus,
    > and 8 bit wide memory.


    I have serious doubts about that one. IBM build 32bit and 64bit
    equipment in the late 60th already and in the 70th I have used TONS of
    that stuff. They knew very well how to design a 16 or 32 bit floppy disk
    controller e.g. I don't think they suddenly forgot about how to do that
    in 1981, and they still sold tons of better equipment.

    > That made development of the IBM PC faster, and also less
    > competition for IBM's other computers.


    That is something very different and this obviously was the case,
    marketing reasons, not technical ones.

    > To software, it looks exactly like the 8086, except you have
    > to be careful when writing self-modifying code.
    >
    > -- glen


    Try to run a realtime OS designed for a 8086 on a 8088. Won't work
    correctly anymore, because all the timing is screwed by the half bus
    size to anything out of the CPU internals. For the BASIC interpreter
    that came with that DOS thing it made no difference of course.

    Udo Munk
    --
    The real fun is building it and then using it...

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