Minimalist CP/M system? - CP/M

This is a discussion on Minimalist CP/M system? - CP/M ; On Sat, 21 Jun 2008 11:54:57 -0700 (PDT), BruceMcF wrote: >On Jun 21, 1:42 pm, no.s...@no.uce.bellatlantic.net wrote: > >> Ah yep, I do too. Requires one addresable port to add >> the needed control/address bits. > >If you have SPI ...

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Thread: Minimalist CP/M system?

  1. Re: Minimalist CP/M system?

    On Sat, 21 Jun 2008 11:54:57 -0700 (PDT), BruceMcF
    wrote:

    >On Jun 21, 1:42 pm, no.s...@no.uce.bellatlantic.net wrote:
    >
    >> Ah yep, I do too. Requires one addresable port to add
    >> the needed control/address bits.

    >
    >If you have SPI already (eg, the mass storage is SD) than it could n
    >be done with an additional select line for selecting a serial shift
    >register for writing?


    To do SPI you need two output bits and one input, one of the output is
    clock and the other data, the input is data. The whole process can be
    bit-bashed in software. Saves a serial register hardware. I don't
    know the SD protocal itself but I've been working with other SPI
    devices (LCD, misc port devices) and it can be an inexpensive way
    to go and SD is pretty cheap.

    Allison

  2. Re: Minimalist CP/M system?

    Bill ha scritto:
    > On Fri, 20 Jun 2008 06:49:07 -0800, glen herrmannsfeldt
    > wrote:
    >
    >> It would be nice in ROM where you don't have to worry
    >> about writing over it. Otherwise, instead of just one
    >> gate arrange so that initially the ROM is read and RAM is
    >> written, copy the whole ROM over, then switch to RAM only.

    >
    > The only thing worse than re-inventing a wheel is re-inventing
    > an OLD wheel.
    >
    > Let's assume you're going to use a Z-80.
    >
    > Then what you want to do is called BANK SWITCH.
    > Z-80s could do that. In ONE instruction.


    Hmmm... You can elaborate on your point ? I have the feeling that you
    have somewhat misunderstand the EXX instruction.....

    Best regards from Italy,
    Dott. Piergiorgio.

  3. Re: Minimalist CP/M system?

    On Sun, 22 Jun 2008 03:29:00 +0200, "dott.Piergiorgio"
    wrote:

    >Bill ha scritto:
    >> On Fri, 20 Jun 2008 06:49:07 -0800, glen herrmannsfeldt
    >> wrote:
    >>
    >>> It would be nice in ROM where you don't have to worry
    >>> about writing over it. Otherwise, instead of just one
    >>> gate arrange so that initially the ROM is read and RAM is
    >>> written, copy the whole ROM over, then switch to RAM only.

    >>
    >> The only thing worse than re-inventing a wheel is re-inventing
    >> an OLD wheel.
    >>
    >> Let's assume you're going to use a Z-80.
    >>
    >> Then what you want to do is called BANK SWITCH.
    >> Z-80s could do that. In ONE instruction.

    >
    >Hmmm... You can elaborate on your point ? I have the feeling that you
    >have somewhat misunderstand the EXX instruction.....
    >
    >Best regards from Italy,
    >Dott. Piergiorgio.


    Tatung Einstein had 32Kb ROM sideways from 0000 and started with ROM
    access on read and ram access on write (can't write to ROM duh). One
    out (n), A command with one byte I/O address (D3 23) switched the mode
    to read/write ram, it simply toggled on that I/O port being accessed,
    the data in reg A didn't matter. It started off by copying large
    chunks of code from ROM in 32K to RAM in upper 32K. This 32K ROM / 32K
    RAM map required the A15 line to be gated with the ROM line, so it's
    not an one gate solution but is an one instruction solution.

    It had MOS (Machine OS) in ROM. This would load track 1 if disc found,
    otherwise it came up in a monitor program. The MOS was a simple
    debugger (Copy, Modify, Fill, Go, Execute, Read sector, Write sector,
    Tabulate, Baud set). The ROM also had most of the BIOS in it. ZDOS (a
    CPM clone) or CPM bios only had to make simple calls to ROM routines.
    This saved a quite a bit of upper memory giving a bigger TPA.

    ALL CPM computers had to do something like this as they all needed a
    loader in ROM to read track 1 to boot the OS. The ROM had to be at
    0000, copy a loader to RAM and then be switched out before passing
    execution to the loader.
    --
    Peter Hill
    Spamtrap reply domain as per NNTP-Posting-Host in header
    Can of worms - what every fisherman wants.
    Can of worms - what every PC owner gets!

  4. Re: Minimalist CP/M system?

    On Jun 21, 3:41 pm, no.s...@no.uce.bellatlantic.net wrote:
    > >If you have SPI already (eg, the mass storage is SD) than it could n
    > >be done with an additional select line for selecting a serial shift
    > >register for writing?

    >
    > To do SPI you need two output bits and one input, one of the output is
    > clock and the other data, the input is data. The whole process can be
    > bit-bashed in software. Saves a serial register hardware. I don't
    > know the SD protocal itself but I've been working with other SPI
    > devices (LCD, misc port devices) and it can be an inexpensive way
    > to go and SD is pretty cheap.


    Plus an output line for select ... if you use the select line (rather
    than, say, tying it down), then the clock, output data and input data
    can be bussed, so if you have eight GPIO pins, that is three for the
    bus and up to five device select. If one of the GPIO is used to toggle
    a boot EPROM into / out of the memory space, four device select. A
    serial flash for permanent mass storage, an SPI UART, and an SD socket
    would be a base system, and there would still be a select line free
    for whatever ... a DAC, a floating point processor for floating point
    processing in a remote data logger ... I was surprised at the range of
    parts there are for SPI.

    SPI access is part of the SD/MMC specification, so any regular SD card
    should be accessible by SPI as a transport. I don't know the SD
    protocol, but I'd assume it could be worked out from the open source
    Linux drivers.

    Actually, come to think of it, adding support for an SD card could be
    a second stage in development after the system is up and running. A
    serial flash RAM would give permanent storage for a R/W CP/M boot
    device, and an SPI UART would give a console, so the boot EPROM could
    just load CP/M from the serial flash, if present ... most of the
    EEPROM would be available to hold a bootstrap that downloads the
    system files over the serial line and saves them to the serial flash
    if they are not already present.

  5. Re: Minimalist CP/M system?

    On Sun, 22 Jun 2008 03:29:00 +0200, "dott.Piergiorgio"
    wrote:

    >Bill ha scritto:


    >> Let's assume you're going to use a Z-80.
    >>
    >> Then what you want to do is called BANK SWITCH.
    >> Z-80s could do that. In ONE instruction.

    >
    >Hmmm... You can elaborate on your point ? I have the feeling that you
    >have somewhat misunderstand the EXX instruction.....


    I suppose you could associate register swapping (EXX) with
    bank switching, such that BOTH are swapped at once.

    It's just my opinion of course, but I found the BigBoard II pretty
    much the ultimate 4Mhz Z-80 system platform. If you DID find
    something Ferguson had left out, there was always the bread-board
    area where you could tack it on.

    Bank switching was designed in, meaning, one instruction - out
    to a register/port. Beyond that, multiple banks were supported,
    and some people hung a meg or more of memory for things like
    RAM/ROM drives. That was why they were popular for disk-less
    controllers and workstations. ALL your needed applications could
    be stored in silicon. Including CP/M (or, MP/M, or whatever...)

    Bill

  6. Re: Minimalist CP/M system?

    On Jun 20, 11:07 pm, Bill wrote:
    > Let's assume you're going to use a Z-80.


    > Then what you want to do is called BANK SWITCH.
    > Z-80s could do that. In ONE instruction.


    Yeah, that is an advantage of a separate I/O address space, you can
    have a bank switch register in I/O address space without worrying
    about how to switch the bank switch register in and out when you are
    switching main memory banks in and out.

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