eprom failures: what way? - CP/M

This is a discussion on eprom failures: what way? - CP/M ; In what direction do EPROMs fail over time: 1 bits become 0 or 0 bits become one? I've been thinking about this as hard as I can and I can understand either occuring: Erasing an EPROM causes charges to enter ...

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  1. eprom failures: what way?

    In what direction do EPROMs fail over time:
    1 bits become 0 or 0 bits become one?

    I've been thinking about this as hard as I can
    and I can understand either occuring:
    Erasing an EPROM causes charges to enter all the cels,
    thus an erased EPROM being all ones.
    Zeroes are selectively programmed
    by forcing charges out of the cell.
    But over time:
    do charges somehow leak out to change zeroes to ones,
    or do charges tend to leak out changing ones to zeroes?

    --
    Jeffrey Jonas
    jeffj@panix(dot)com
    The original Dr. JCL and Mr .hide
    --

    -- mejeep deMeep ferret!

  2. Re: eprom failures: what way?

    My experience with some of the earliest EPROMS (1700 and 2700 families) is
    that they go to 1's, and generally in a large array if not totally. I would
    expect that the READ/WRITE buffers played the greatest part in this kind of
    failure due to tighter geometry and increased heating in the conductive
    layers. This is purely speculative on my part, though... your mileage may
    vary!

    Regards,

    -Thomas "Todd" Fischer


    "Jeff Jonas" wrote in message
    news:eb8hs9$s1q$1@panix3.panix.com...
    > In what direction do EPROMs fail over time:
    > 1 bits become 0 or 0 bits become one?
    >
    > I've been thinking about this as hard as I can
    > and I can understand either occuring:
    > Erasing an EPROM causes charges to enter all the cels,
    > thus an erased EPROM being all ones.
    > Zeroes are selectively programmed
    > by forcing charges out of the cell.
    > But over time:
    > do charges somehow leak out to change zeroes to ones,
    > or do charges tend to leak out changing ones to zeroes?
    >
    > --
    > Jeffrey Jonas
    > jeffj@panix(dot)com
    > The original Dr. JCL and Mr .hide
    > --
    >
    > -- mejeep deMeep ferret!




  3. Re: eprom failures: what way?

    On 7 Aug 2006 19:20:41 -0400, jeffj@panix.com (Jeff Jonas) wrote:

    >In what direction do EPROMs fail over time:
    >1 bits become 0 or 0 bits become one?


    They fail for several reasons. If the cell losses charge
    the condition is the same as erased usually 1's.

    However I've seen bit line failures where ALL bits for say D0
    are stuck at 1 or 0.

    The other type of failure is internal array decode where the
    row or column decoders go away for some reason and you get
    block or regurally occuring bad bits.

    Generally unless the Eprom was exposed to sun or Xrays bits
    don't seem to fail. I've seen parts fail showing bad bits but
    were NOT eraseable or reprogramable. At least I've never
    seen one exhibit bit rot yet and I have some 30 year old
    eproms (1702, 5404, 2708, 2758) on boards that still
    work.

    Supposededly bit rot should show by now. But what is forgotten
    is part can fail for a whole list of other reasons unrelated to the
    array of cells. HIgh up on the list are IO failures from voltage or
    current stress, thermal cycles and an assortment of metalization
    failures.


    Allison

    >
    >I've been thinking about this as hard as I can
    >and I can understand either occuring:
    >Erasing an EPROM causes charges to enter all the cels,
    >thus an erased EPROM being all ones.
    >Zeroes are selectively programmed
    >by forcing charges out of the cell.
    >But over time:
    >do charges somehow leak out to change zeroes to ones,
    >or do charges tend to leak out changing ones to zeroes?
    >
    >--
    >Jeffrey Jonas
    >jeffj@panix(dot)com
    >The original Dr. JCL and Mr .hide



  4. Re: eprom failures: what way?

    Thomas "Todd" Fischer wrote:

    > My experience with some of the earliest EPROMS (1700 and 2700 families) is
    > that they go to 1's, and generally in a large array if not totally. I would
    > expect that the READ/WRITE buffers played the greatest part in this kind of
    > failure due to tighter geometry and increased heating in the conductive
    > layers. This is purely speculative on my part, though... your mileage may
    > vary!


    I thought that 1702's erase to 0's, and 2708's erased to 1's. I don't
    know past that, but I believe 1702's are PMOS and 2708's NMOS.

    -- glen


  5. Re: eprom failures: what way?

    My only experience with EPROM failures turned out to be that an EPROM wasn't
    fully erased. Only some of the 0's changed to 1's. Funny things started to
    happen when the system had been running for some time. The problems went
    away when the system cooled down. A heat gun was used to cause problems,
    freeze mist was used to make the problems go away. Reading the EPROM hot
    reveled that some 0's were now 1's. Reading with the EPROM cold gave the
    original data. Completely erasing the EPROM and reprogramming it exhibited
    no problems, even with the heat gun. It turns out that that EPROM was used
    as it came from the manufacturer and not properly erased. Always erase them
    before use even if they show erased. The EPROMS were 2716's.

    Don

    "Jeff Jonas" wrote in message
    news:eb8hs9$s1q$1@panix3.panix.com...
    > In what direction do EPROMs fail over time:
    > 1 bits become 0 or 0 bits become one?
    >
    > I've been thinking about this as hard as I can
    > and I can understand either occuring:
    > Erasing an EPROM causes charges to enter all the cels,
    > thus an erased EPROM being all ones.
    > Zeroes are selectively programmed
    > by forcing charges out of the cell.
    > But over time:
    > do charges somehow leak out to change zeroes to ones,
    > or do charges tend to leak out changing ones to zeroes?
    >
    > --
    > Jeffrey Jonas
    > jeffj@panix(dot)com
    > The original Dr. JCL and Mr .hide
    > --
    >
    > -- mejeep deMeep ferret!




  6. Re: eprom failures: what way?

    >In what direction do EPROMs fail over time:
    >1 bits become 0 or 0 bits become one?


    Age related failure usually happens in the direction
    of erasure (ie, if the device erases to all 1's then
    0 bits will turn into 1).

    Basically, in it's erased state the device reads at
    one level (usually 1 for more "modern" devices :-)
    and it is programmed by placing a charge on the
    gate. This charge very slowly dissipates over time
    which returns the device to the erased state - UV light
    causes it to disipate much faster.

    Other failure modes can however cause other
    symptoms - like any chip, it can fail in unpredictible
    ways.

    Dave


    --
    Dunfield Development Services http://www.dunfield.com
    Low cost software development tools for embedded systems
    Software/firmware development services Fax:613-256-5821


  7. Re: eprom failures: what way?

    On Tue, 08 Aug 2006 06:05:23 GMT, "Donald Harris"
    wrote:

    >My only experience with EPROM failures turned out to be that an EPROM wasn't
    >fully erased. Only some of the 0's changed to 1's. Funny things started to
    >happen when the system had been running for some time. The problems went
    >away when the system cooled down. A heat gun was used to cause problems,
    >freeze mist was used to make the problems go away. Reading the EPROM hot
    >reveled that some 0's were now 1's. Reading with the EPROM cold gave the
    >original data. Completely erasing the EPROM and reprogramming it exhibited
    >no problems, even with the heat gun. It turns out that that EPROM was used
    >as it came from the manufacturer and not properly erased. Always erase them
    >before use even if they show erased. The EPROMS were 2716's.


    Erase properly, program properely. I've seen teh same effect from
    programmers that were setup wrong (wrong part selected or out of cal).

    later Eproms (2764 and later) have programming sequences designed to
    insure the charge on the gate is adaquate (margining). However it's
    still possible to have an intel 27C64 programed as a AMD2764 and be
    marginal.

    Allison

    >
    >Don
    >
    >"Jeff Jonas" wrote in message
    >news:eb8hs9$s1q$1@panix3.panix.com...
    >> In what direction do EPROMs fail over time:
    >> 1 bits become 0 or 0 bits become one?
    >>
    >> I've been thinking about this as hard as I can
    >> and I can understand either occuring:
    >> Erasing an EPROM causes charges to enter all the cels,
    >> thus an erased EPROM being all ones.
    >> Zeroes are selectively programmed
    >> by forcing charges out of the cell.
    >> But over time:
    >> do charges somehow leak out to change zeroes to ones,
    >> or do charges tend to leak out changing ones to zeroes?
    >>
    >> --
    >> Jeffrey Jonas
    >> jeffj@panix(dot)com
    >> The original Dr. JCL and Mr .hide
    >> --
    >>
    >> -- mejeep deMeep ferret!

    >



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